RuigeLee
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9058337ffe
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大小端对换，主站已经发出初始化包
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2024-10-29 18:11:50 +08:00 |
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RuigeLee
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332fcf010d
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主从联合仿真开始
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2024-10-29 17:32:17 +08:00 |
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RuigeLee
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ff4508ec35
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写了一部分软件
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2024-10-29 15:08:45 +08:00 |
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RuigeLee
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683b6cad92
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拆分主站从站软件
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2024-10-29 11:21:04 +08:00 |
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RuigeLee
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57c6c15c29
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中断模式软件完成
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2024-10-29 09:33:29 +08:00 |
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RuigeLee
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7bcd0aaca0
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启用中断，开始调中断软件
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2024-10-28 18:01:25 +08:00 |
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RuigeLee
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c29ca8dd27
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汇编模式建立
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2024-10-28 15:51:12 +08:00 |
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RuigeLee
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126ea745fd
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发送长度需要乘以4，增加轮询fifo是否已经填满
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2024-10-28 10:38:34 +08:00 |
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RuigeLee
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78d54d2083
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编译通过 仿真启动 请知悉 改处理器没有csr
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2024-10-25 17:46:21 +08:00 |
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RuigeLee
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8950af8a47
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下行已完成
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2024-10-17 18:32:11 +08:00 |
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RuigeLee
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ab0fab00fa
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物理层和链路层各自有header，需要打包两次
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2024-10-17 11:43:16 +08:00 |
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RuigeLee
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84b978cbc9
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length扩充为12bits， 取头位宽错误修复
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2024-10-16 17:31:53 +08:00 |
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RuigeLee
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0dc046bffe
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仿真开始
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2024-10-16 16:17:52 +08:00 |
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RuigeLee
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3c357b54e0
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4倍频采3次
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2024-09-20 14:55:43 +08:00 |
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RuigeLee
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1368e9037d
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CDR基本测试通过
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2024-09-19 15:23:38 +08:00 |
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RuigeLee
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ba6099608c
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CDR发送测试完成
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2024-09-11 17:21:14 +08:00 |
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RuigeLee
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7350f3bcf4
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仿真，状态机错误
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2024-09-10 18:39:35 +08:00 |
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RuigeLee
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50403930a9
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check chain
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2023-08-09 16:34:29 +08:00 |
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RuigeLee
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68e0a6a055
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test pass
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2023-08-07 11:40:14 +08:00 |
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RuigeLee
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35e6fcdb52
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mst test pass
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2023-08-01 14:44:05 +08:00 |
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RuigeLee
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3aa4ca17d4
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all test pass
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2023-07-28 20:42:35 +08:00 |
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RuigeLee
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2048a4d286
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first test
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2023-07-28 15:38:46 +08:00 |
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RuigeLee
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6cb9d0982e
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tb remove
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2023-07-19 11:30:26 +08:00 |
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RuigeLee
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e3e1f6b6cb
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a new top for fpga; port mac-master to mem
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2023-07-17 21:41:34 +08:00 |
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RuigeLee
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de5eb461f6
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sim env
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2023-07-17 09:26:20 +08:00 |
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