Ruige Lee 8c09a6c4aa 写死16相位 ...

Merge branch 'mp_eb_dev' into feature/multiPhaseCDRIn

# Conflicts:
#	src/main/scala/backBoard/ebus/CDRIn.scala
#	src/main/scala/backBoard/shin/ShinTop.scala
#	tb/shinTest/ShinTopSpiTb.v

2025-08-05 16:49:41 +08:00

..

shinTest

写死16相位

2025-08-05 16:49:41 +08:00

sw

合并bacon_dev分支的修改：1.增加寻找超出指定执行周期的指令；2.删除汇编中不需要的代码；3.增加协议的细节内容

2025-03-03 10:59:07 +08:00

verilator

CDRIn采样率改为8x，允许参数化

2025-04-02 15:44:32 +08:00

backSys_tb.v

切换大块SRAM

2024-11-04 17:38:51 +08:00

cdrInOut_tb.v

4倍频采3次

2024-09-20 14:55:43 +08:00

cdrOut_tb.v

仿真，状态机错误

2024-09-10 18:39:35 +08:00

ShinBack_tb.v

下行已完成

2024-10-17 18:32:11 +08:00

sim_backChain.cpp

check chain

2023-08-09 16:34:29 +08:00

sim_backMst.cpp

test pass

2023-08-07 11:40:14 +08:00

sim_backSlv.cpp

all test pass

2023-07-28 20:42:35 +08:00