每次初始化强制清除sync,trans,uni标志位

src/main/scala/backBoard/BackBoardMst.scala

@@ -292,6 +292,9 @@ trait BackBoardMstLVDSInit{ this: BackBoardMstLVDSBase =>
       mirrorReg.io.enwB   := true.B
 
       ctrlInit    := false.B
+      ctrlSynch   := false.B
+      ctrlTransmit := false.B
+      ctrlUnicast := false.B
       interrupt   := true.B
 
     } .elsewhen( stateCur === 7.U ){