Ruige Lee
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f3916df37b
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弃用高频率采样CDR的例化
Merge branch 'mp_eb_dev_多采样全表决' into mp_eb_dev
* mp_eb_dev_多采样全表决:
调整解锁条件为10个连续0
增加一个锁定可以暂时解决发送失败问题
滤波 表决 鉴相同时存在
enhance 要求先跨时钟，再进行后续表决
Revert "16相位改8相位"
16相位改8相位
bug: 16相位补充相 欠了一相
Revert "改6相位，从一个pll出，测试"
Revert "尝试3相位"
尝试3相位
改6相位，从一个pll出，测试
拉出测试IO
Revert "4多相位效果明显更好"
4多相位效果明显更好
16相位操作还是卡
# Conflicts:
# src/main/scala/backBoard/ebus/CDRIn.scala
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2025-08-19 10:00:25 +08:00 |
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Ruige Lee
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2fb450673f
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调整解锁条件为10个连续0
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2025-08-18 17:39:32 +08:00 |
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Ruige Lee
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2afd3f722a
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增加一个锁定可以暂时解决发送失败问题
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2025-08-18 16:20:50 +08:00 |
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Ruige Lee
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11bbf14226
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滤波 表决 鉴相同时存在
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2025-08-15 17:18:45 +08:00 |
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Ruige Lee
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45d2d223c1
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enhance 要求先跨时钟，再进行后续表决
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2025-08-15 15:28:28 +08:00 |
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Ruige Lee
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62684bd665
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Revert "16相位改8相位"
This reverts commit 2da45138db.
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2025-08-15 10:45:44 +08:00 |
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Ruige Lee
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2da45138db
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16相位改8相位
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2025-08-15 10:45:10 +08:00 |
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Ruige Lee
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fc917054ed
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bug: 16相位补充相 欠了一相
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2025-08-14 19:23:56 +08:00 |
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Ruige Lee
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573a1ad45f
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bug:滤波需要顺序打拍，防止边界上跳变
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2025-08-14 19:15:09 +08:00 |
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Ruige Lee
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035109bee1
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Revert "改6相位，从一个pll出，测试"
This reverts commit 495a238a26.
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2025-08-13 17:54:50 +08:00 |
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Ruige Lee
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4955b7a278
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Revert "尝试3相位"
This reverts commit c6aa7416fc.
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2025-08-13 17:54:39 +08:00 |
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Ruige Lee
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6c2f2fa93b
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主站必须发送大于8byte的包才会更新同步寄存器
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2025-08-13 15:39:00 +08:00 |
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Ruige Lee
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b97ce75c39
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Revert "从站只在同步包时更新自身时间信息"
This reverts commit 3f41920805.
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2025-08-13 11:40:19 +08:00 |
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Ruige Lee
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3f41920805
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从站只在同步包时更新自身时间信息
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2025-08-13 11:08:56 +08:00 |
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Ruige Lee
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c6aa7416fc
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尝试3相位
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2025-08-13 10:52:49 +08:00 |
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Ruige Lee
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495a238a26
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改6相位，从一个pll出，测试
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2025-08-13 10:00:11 +08:00 |
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Ruige Lee
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2a7faafcff
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修复位宽推断错误
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2025-08-12 18:09:40 +08:00 |
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Ruige Lee
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d045705950
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spi初始值改为1
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2025-08-12 17:54:24 +08:00 |
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Ruige Lee
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cb2c4f46e5
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拉出测试IO
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2025-08-12 17:48:35 +08:00 |
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Ruige Lee
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107895f6e0
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Revert "4多相位效果明显更好"
This reverts commit 7338314c17.
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2025-08-12 09:55:43 +08:00 |
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Ruige Lee
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7338314c17
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4多相位效果明显更好
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2025-08-11 19:33:56 +08:00 |
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Ruige Lee
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b0b221e8b0
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16相位操作还是卡
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2025-08-11 18:13:58 +08:00 |
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5448cfd23f
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增加顶层的FPGA上的sync输出,修改测试用例
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2025-08-11 18:04:46 +08:00 |
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Ruige Lee
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b590ad79bc
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增加spi模式选择到顶层
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2025-08-11 16:55:43 +08:00 |
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Ruige Lee
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86fc61e0a4
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增加两组寄存器
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2025-08-11 16:54:18 +08:00 |
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Ruige Lee
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eefa793c11
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Merge remote-tracking branch 'origin/eb_dev' into mp_eb_dev
# Conflicts:
# tb/shinTest/ShinTopSpiTb.v
# tb/shinTest/testcase_result/base_tc06_result.log
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2025-08-11 16:13:26 +08:00 |
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Ruige Lee
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1cb0cee966
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should >= 3
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2025-08-11 10:07:54 +08:00 |
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Ruige Lee
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a31b08dcda
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Merge branch 'mp_eb_dev' of github.com:whutddk/RISCV-MAC-SWICH into mp_eb_dev
# Conflicts:
# src/main/scala/backBoard/ebus/CDROut.scala
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2025-08-11 10:07:18 +08:00 |
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Ruige Lee
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cae503f4c2
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preamble应该大于3
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2025-08-11 10:05:49 +08:00 |
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RuigeLee
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424e07a076
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增加5选3多数表决滤波
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2025-08-09 22:22:19 +08:00 |
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1ce3840567
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PRE_NUM改为8后，功能正常
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2025-08-08 22:42:21 +08:00 |
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Ruige Lee
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7d39514eb8
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序列号区域拉到顶层
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2025-08-08 16:28:39 +08:00 |
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Ruige Lee
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0dc678e604
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硬件错误必须发生时清0才会触发部分复位
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2025-08-08 11:13:00 +08:00 |
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Ruige Lee
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dc4539124c
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可调preamble长度
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2025-08-07 17:39:11 +08:00 |
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Ruige Lee
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2aa55cee65
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Merge branch 'eb_dev' into mp_eb_dev
# Conflicts:
# src/main/scala/backBoard/shin/Interface.scala
# src/main/scala/backBoard/shin/ShinTop.scala
# tb/shinTest/ShinTopSpiTb.v
# tb/shinTest/gen_pkt.py
# tb/shinTest/testcase/base.py
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2025-08-07 16:11:42 +08:00 |
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Ruige Lee
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0b84a1dc6f
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上电复位状态下，上下行直通，设置为主站或者写清复位中断可以解除
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2025-08-07 10:27:37 +08:00 |
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Ruige Lee
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73e1061c0b
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ebmmu提升到16个
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2025-08-06 17:44:16 +08:00 |
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Ruige Lee
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1eb19cbca7
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代码清理
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2025-08-06 16:56:12 +08:00 |
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Ruige Lee
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aab71da90c
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增加主站本地同步，和中断3；增加latch Event中断
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2025-08-06 16:50:43 +08:00 |
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Ruige Lee
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f3891c8b16
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调整同步，允许主站产生sync0，1，2，3信号
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2025-08-06 16:03:56 +08:00 |
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Ruige Lee
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87c7bf6f41
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看门狗挪到特质里
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2025-08-06 15:23:43 +08:00 |
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Ruige Lee
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8a41553aea
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硬件中断使能时钟为高
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2025-08-06 13:00:36 +08:00 |
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Ruige Lee
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41b83b83bc
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增加看门狗17，加强看门狗中断条件
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2025-08-06 13:00:36 +08:00 |
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e107b39cb7
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增加了新的测试事件寄存器组的代码
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2025-08-06 13:00:36 +08:00 |
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Ruige Lee
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fd3bae6a04
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硬件中断使能时钟为高
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2025-08-06 11:42:59 +08:00 |
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Ruige Lee
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fc4fe95ffe
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增加看门狗17，加强看门狗中断条件
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2025-08-06 11:04:22 +08:00 |
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Ruige Lee
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4919c357b3
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FPGA顶层
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2025-08-05 17:11:09 +08:00 |
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Ruige Lee
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8c09a6c4aa
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写死16相位
Merge branch 'mp_eb_dev' into feature/multiPhaseCDRIn
# Conflicts:
# src/main/scala/backBoard/ebus/CDRIn.scala
# src/main/scala/backBoard/shin/ShinTop.scala
# tb/shinTest/ShinTopSpiTb.v
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2025-08-05 16:49:41 +08:00 |
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452c5149bf
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增加了新的测试事件寄存器组的代码
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2025-08-05 15:18:42 +08:00 |
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03b63276b8
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增加新的测试用例
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2025-08-04 18:28:57 +08:00 |
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