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修复访问寄存器空间范围

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Ruige Lee
2025-05-21 10:48:22 +08:00
parent 8779d92790
commit f8712482ee
1 changed files with 9 additions and 9 deletions
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18
src/main/scala/backBoard/shin/Interface.scala
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@@ -424,15 +424,15 @@ trait InterfaceMCUop{ this: InterfaceBase =>
))
datar := MuxCase( 0.U, Array(
((addrr & "hFF00".U) === "h0000".U) -> AcquireReg(addr = addrr),
((addrr & "hFF00".U) === "h0800".U) -> io.sram_r(0).datar,
((addrr & "hFF00".U) === "h1000".U) -> 0.U,
((addrr & "hFF00".U) === "h1800".U) -> io.sram_r(1).datar,
((addrr & "hFF00".U) === "h2000".U) -> 0.U,
((addrr & "hFF00".U) === "h2800".U) -> io.sram_r(2).datar,
((addrr & "hFF00".U) === "h3000".U) -> 0.U,
((addrr & "hFF00".U) === "h3800".U) -> io.sram_r(3).datar,
((addrr & "hFF00".U) === "h4000".U) -> 0.U,
((addrr & "hF800".U) === "h0000".U) -> AcquireReg(addr = addrr),
((addrr & "hF800".U) === "h0800".U) -> io.sram_r(0).datar,
((addrr & "hF800".U) === "h1000".U) -> 0.U,
((addrr & "hF800".U) === "h1800".U) -> io.sram_r(1).datar,
((addrr & "hF800".U) === "h2000".U) -> 0.U,
((addrr & "hF800".U) === "h2800".U) -> io.sram_r(2).datar,
((addrr & "hF800".U) === "h3000".U) -> 0.U,
((addrr & "hF800".U) === "h3800".U) -> io.sram_r(3).datar,
((addrr & "hF800".U) === "h4000".U) -> 0.U,
))
iQSpi.io.datar := Mux(cReg.spiSel === 0.U, datar, 0.U)