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增加spi模式选择到顶层

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This commit is contained in:
Ruige Lee
2025-08-11 16:55:43 +08:00
parent 86fc61e0a4
commit b590ad79bc
1 changed files with 2 additions and 0 deletions
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src/main/scala/backBoard/shin/ShinTop.scala
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@@ -35,6 +35,7 @@ class ShinTopIO extends Bundle{
val pllCtrl = Output(UInt(32.W)) val pllCtrl = Output(UInt(32.W))
val xtal = Output(UInt(12.W)) val xtal = Output(UInt(12.W))
val spiSel = Output(UInt(2.W))
} }
@@ -85,6 +86,7 @@ abstract class ShinTopBase extends Module{
io.pllCtrl := interface.io.cReg.pllCtrl io.pllCtrl := interface.io.cReg.pllCtrl
io.xtal := interface.io.cReg.xtal(11,0) io.xtal := interface.io.cReg.xtal(11,0)
io.spiSel := interface.io.cReg.spiSel
val sram = Seq( val sram = Seq(
for( _ <- 0 until 4 ) yield { Module(new ShareSRAM2k) }, for( _ <- 0 until 4 ) yield { Module(new ShareSRAM2k) },