ruige/eb001
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

主站的代码使用最新的策略进行工作，可以编译，仿真有错误，尚未验证

Browse Source
This commit is contained in:
bacon
2025-02-09 01:17:17 +08:00
parent 55675b93c9
commit 6e72db048a
9 changed files with 441 additions and 307 deletions
Download Patch File Download Diff File Expand all files Collapse all files

154
tb/sw/src/MstMain.c
View File

@@ -1,9 +1,7 @@
#include <stdint.h>
// #include "uart.h"
// #include "gpio.h"
// #include "timer.h"
#include "tl2cdr.h"
#include "mstMainCfg.h"
#include "sysDef.h"
volatile uint32_t *plic_priority_3 = (uint32_t*)( 0xc000000U + 0X000004 * 3);
volatile uint32_t *plic_priority_4 = (uint32_t*)( 0xc000000U + 0X000004 * 4);
@@ -27,53 +25,19 @@ volatile uint32_t *plic_enable_0_31 = (uint32_t*)( 0xc000000U + 0X002000 );
volatile uint32_t *plic_threshold_0 = (uint32_t*)( 0xc000000U + 0X200000 );
volatile uint32_t *plic_claim = (uint32_t*)( 0xc000000U + 0X200004 );
volatile uint32_t flag_intTxEnd = 0;
volatile uint32_t flag_intRxError = 0;
volatile uint32_t flag_intRxStart = 0;
volatile uint32_t flag_intRxEnd = 0;
void plic_handle(){
// 从 PLIC 中获取中断源 ID
uint32_t claim = *plic_claim;
if( claim == CDR_INT_TXEND ){
flag_intTxEnd = 1;
} else if( claim == CDR_INT_RXERROR ){
flag_intRxError = 1;
} else if( claim == CDR_INT_RXSTART ){
flag_intRxStart = 1;
} else if( claim == CDR_INT_RXEND ){
flag_intRxEnd = 1;
}
// 通知 PLIC 完成中断处理
*plic_claim = claim;
return;
}
uint8_t MST_TX_BUF[TX_BUF_NUM * TX_BUF_MAX_LEN] __attribute__((aligned(32)));
uint8_t MST_RX_BUF[RX_BUF_NUM * RX_BUF_MAX_LEN] __attribute__((aligned(32)));
static inline void error() {
while(1);
}
// extern volatile uint32_t *cdr_status = (uint32_t*)( TL2CDR_BASE + CDR_ReadStatus ); //read
// extern volatile uint32_t *cdr_txLen = (uint32_t*)( TL2CDR_BASE + CDR_WriteTxLen ); //write
// extern volatile uint32_t *cdr_txFifo = (uint32_t*)( TL2CDR_BASE + CDR_WriteTxFifo ); //write
// extern volatile uint32_t *cdr_direct = (uint32_t*)( TL2CDR_BASE + CDR_WriteTransDir ); //write
// extern volatile uint32_t *cdr_softReset = (uint32_t*)( TL2CDR_BASE + CDR_WriteSoftReset ); //write
// extern volatile uint32_t *cdr_rxLen = (uint32_t*)( TL2CDR_BASE + CDR_ReadRxLen ); //read
// extern volatile uint32_t *cdr_rxFifo = (uint32_t*)( TL2CDR_BASE + CDR_ReadRxFifo ); //read
//extern const uint8_t mst_svr_code[];
//uint32_t (*init_svr_code)(void);
extern const uint8_t int_svr_code[];
uint32_t (*sys_call)(uint32_t no, ...);
void main()
{
#if 0
uint32_t readDat;
uint32_t operator;
uint32_t downRecvLen;
@@ -84,59 +48,91 @@ void main()
uint32_t isLast;
uint32_t led = 0;
uint32_t crc;
#endif
//init_svr_code = (uint32_t (*)(void))mst_svr_code;
*plic_enable_0_31 = 1 << CDR_INT_TXEND | 1 << CDR_INT_RXERROR | 1 << CDR_INT_RXSTART | 1 << CDR_INT_RXEND;
int i;
/*初始化plic*/
*plic_enable_0_31 = 1 << CDR_INT_TX0END
//| 1 << CDR_INT_TX1END
//| 1 << CDR_INT_RX0ERROR
| 1 << CDR_INT_RX1ERROR
//| 1 << CDR_INT_RX0START
| 1 << CDR_INT_RX1START
//| 1 << CDR_INT_RX0END
| 1 << CDR_INT_RX1END
| 1 << CDR_INT_TX0_FIFO_DEQ
//| 1 << CDR_INT_TX1_FIFO_DEQ
//| 1 << CDR_INT_RX0_FIFO_ENQ
| 1 << CDR_INT_RX1_FIFO_ENQ
;
*plic_priority_TxEnd = 1;
*plic_priority_RxError = 1;
*plic_priority_RxStart = 1;
*plic_priority_RxEnd = 1;
*plic_threshold_0 = 0;
{//再写一次实现延迟，等从机的复位完成
*plic_enable_0_31 = 1 << CDR_INT_TXEND | 1 << CDR_INT_RXERROR | 1 << CDR_INT_RXSTART | 1 << CDR_INT_RXEND;
*plic_priority_TxEnd = 1;
*plic_priority_RxError = 1;
*plic_priority_RxStart = 1;
*plic_priority_RxEnd = 1;
*plic_threshold_0 = 0;
}
#if 0
//再写一次实现延迟，等从机的复位完成
*plic_enable_0_31 = 1 << CDR_INT_TXEND | 1 << CDR_INT_RXERROR | 1 << CDR_INT_RXSTART | 1 << CDR_INT_RXEND;
*plic_priority_TxEnd = 1;
*plic_priority_RxError = 1;
*plic_priority_RxStart = 1;
*plic_priority_RxEnd = 1;
*plic_threshold_0 = 0;
#else
//延迟等待从机复位，初始化
for (i = 0; i < 100; i++)
asm volatile("nop");
#endif
//while (init_svr_code() != 1);
sys_call = (void *)int_svr_code;
*cdr_softReset = 1; //复位脉冲
*cdr_direct = 0;
//复位脉冲
*tx0_softReset = 1;
*tx1_softReset = 1;
*rx0_softReset = 1;
*rx1_softReset = 1;
register uint32_t flag;
// asm volatile ( //timer 2s
// "1:\n"
// "rdcycle %0\n"
// // "srli %0, %0, 12\n"
// "srli %0, %0, 27\n"
// // "srli %0, %0, 26\n"
// "andi %0, %0, 0x1\n"
// "beqz %0, 1b\n"
// :"+r"(flag)
// );
//tx0 下行
//tx1 上行
//rx0 下行
//rx1 上行
uint32_t tx_len;
tx_len = 32;
// if( led ){
// *WriteGpio = 0xFFFFFFFF;
// led = 0;
// } else{
// *WriteGpio = 0x0;
// led = 1;
// }
for (i = 0; i < tx_len / 4 - 1; i++)
{
MST_TX_BUF[i] = i;
}
//发送下行包头
*cdr_txLen = 520; //总长520
*cdr_txFifo = (512 << 20) |( 0 << 16) | 0x0000; //负载长度512，操作数0， 参数全0
*cdr_txFifo = 0x00000000;
sys_call(SYS_SET_RECV_INFO, MST_RX_BUF);
sys_call(SYS_SEND_DATA, MST_TX_BUF, tx_len);
while (1);
#if 0
*cdr_txLen = 520; //总长520
*cdr_txFifo = (512 << 20) |( 0 << 16) | 0x0000; //负载长度512，操作数0， 参数全0
*cdr_txFifo = 0x00000000;
for( uint32_t i = 0; i < 512/4 - 1; i ++ ){
*cdr_txFifo = 0x00000000;
@@ -236,6 +232,6 @@ void main()
flag_intRxEnd = 0;
totNum = (upRecvLen >> 3);
#endif
}

9
tb/sw/src/mstMainCfg.h Normal file
View File

@@ -0,0 +1,9 @@
#ifndef __MSTMAINCFG_H__
#define __MSTMAINCFG_H__
#define TX_BUF_NUM 2
#define TX_BUF_MAX_LEN 1024
#define RX_BUF_NUM 2
#define RX_BUF_MAX_LEN 1024
#endif

36
tb/sw/src/mstStartup.S
View File

@@ -1,13 +1,9 @@
#include "tl2cdr.h"
.extern main
.extern plic_handle
.extern int_svr_code
.extern plic_claim
.extern flag_intTxEnd
.extern flag_intRxError
.extern flag_intRxStart
.extern flag_intRxEnd
.globl _prog_start
.section .text.init
@@ -50,32 +46,14 @@ _prog_start:
li sp, 0x40011000
li a0, 0
lui t0, %hi(plic_claim)
lw a0, %lo(plic_claim)(t0)
#la a0, plic_claim
#lui t0, %hi(flag_intTxEnd)
#lw a1, %lo(flag_intTxEnd)(t0)
lw a1, %lo(plic_claim)(t0)
la a1, flag_intTxEnd
#lui t0, %hi(flag_intRxError)
#lw a2, %lo(flag_intRxError)(t0)
la a2, flag_intRxError
#lui t0, %hi(flag_intRxStart)
#lw a3, %lo(flag_intRxStart)(t0)
la a3, flag_intRxStart
#lui t0, %hi(flag_intRxEnd)
#lw a4, %lo(flag_intRxEnd)(t0)
la a4, flag_intRxEnd
call int_svr_code
mv t0, a0 #这里选择不同的trap_entry服务函数,这个是RV32I的代码
#la t0, trap_entry #这个是最初版的trap_entry，仅做了RV32E的改造
#la t0, opt_trap_entry #这个是做了汇编优化的，也做了RV32E的改造
csrw mtvec, t0
li t0, 1 << 11
csrw mie, t0
@@ -89,6 +67,8 @@ _prog_start:
ecall
#if 0
.balign 32
.section .trap_entry, "ax", %progbits
trap_entry:
@@ -314,5 +294,5 @@ opt_trap_entry:
mret
#endif

284
tb/sw/src/mstSvr.S
View File

@@ -1,97 +1,231 @@
#include "tl2cdr.h"
#include "sysDef.h"
#if 0
/*
其他代码全部使用RV32E编译，仅此代码采用 RV32I 编译，故而可以使用x0, x16~x31寄存器
为了方便，不再使用ABI中的别名，直接使用x0, x16~x31；x1~x15使用ABI中定义的别名
x16~x23, 作为临时寄存器使用
x24, TL2CDR_BASE
x25, 接收数据的存储地址，第一个4字节接收数据的长度，往后都是数据
x26, 当前需要发送的数据的地址，第一个4个字节是长度(写入tx0_txLen)、第二开始是数据
x27, 需要发送的数据长度
x28, plic_claim的地址，用于读取当前正在服务的中断号，清除中断号
x29, REG_ISR_ADDR 中断服务子程序入口
x30, 最小的服务中断号
x31, 最大的服务中断号
*/
#endif
#define REG_TL2CDR_BASE x24
#define REG_rx_data x25
#define REG_tx_data x26
#define REG_tx_data_len x27
#define REG_plic_claim x28
#define REG_ISR_ADDR x29
#define REG_min_isr_num x30
#define REG_max_isr_num x31
.globl _prog_start
.globl _rv32i_plic_handle
.section .text.init, "ax", %progbits
#if 0
#其他代码全部使用RV32E编译，仅此代码采用 RV32I 编译，故而可以使用x0, x16~x31寄存器
#为了方便，不再使用ABI中的别名，直接使用x0, x16~x31；x1~x15使用ABI中定义的别名
#endif
_prog_start:
li x16, 0
//a0 call_function no
li x16, SYS_INIT
beqz a0, init_system_func //初始化系统，输入必要的地址信息，返回 中断程序 的地址
mv x17, a0 # plic_claim
mv x18, a1 # flag_intTxEnd
mv x19, a2 # flag_intRxError
mv x20, a3 # flag_intRxStart
mv x21, a4 # flag_intRxEnd
mv x22, x0
li x16, SYS_SEND_DATA
beq a0, x16, send_data_func
#lui x23, %hi(_rv32i_plic_handle)
#lw x24, %lo(_rv32i_plic_handle)(x23)
li x16, SYS_SET_RECV_INFO
beq a0, x16, set_recv_info_func
10: j 10b //死循环，输入错误的功能号
ret //心理安慰，并不会返回
la x24, _rv32i_plic_handle
//初始化系统，输入必要的地址信息，返回中断程序的地址
//a1, plic_claim的地址, 其实也可以不用传送
init_system_func:
mv REG_plic_claim, a1 # plic_claim
/*初始化isr_hdl_table，中断表*/
la x16, isr_hdl_table
li x25, 1
li x26, 0
li x27, 0
li x28, CDR_INT_TXEND
li x29, CDR_INT_RXERROR
li x30, CDR_INT_RXSTART
li x31, CDR_INT_RXEND
la x17, isr_tx0_end_hdl
addi x16, x16, 4
sw x17, 0(x16)
la x17, isr_tx1_end_hdl
addi x16, x16, 4
sw x17, 0(x16)
mv a0, x24
la x17, isr_rx0_err_hdl
addi x16, x16, 4
sw x17, 0(x16)
li x23, 0
li x24, 0
la x17, isr_rx1_err_hdl
addi x16, x16, 4
sw x17, 0(x16)
la x17, isr_rx0_start_hdl
addi x16, x16, 4
sw x17, 0(x16)
la x17, isr_rx1_start_hdl
addi x16, x16, 4
sw x17, 0(x16)
la x17, isr_rx0_end_hdl
addi x16, x16, 4
sw x17, 0(x16)
la x17, isr_rx1_end_hdl
addi x16, x16, 4
sw x17, 0(x16)
la x17, isr_tx0_deq_hdl
addi x16, x16, 4
sw x17, 0(x16)
la x17, isr_tx1_deq_hdl
addi x16, x16, 4
sw x17, 0(x16)
la x17, isr_rx0_enq_hdl
addi x16, x16, 4
sw x17, 0(x16)
la x17, isr_rx1_enq_hdl
addi x16, x16, 4
sw x17, 0(x16)
la x17, _rv32i_plic_handle
mv a0, x17
li REG_TL2CDR_BASE, TL2CDR_BASE
la REG_ISR_ADDR, isr_hdl_table
li REG_min_isr_num, 14
li REG_max_isr_num, 25
li x23, 4
ret
//主站启动发送数据
//a1, 当前需要发送的数据的地址
//a2, 当前数据发送的长度
send_data_func:
mv REG_tx_data, a1
mv REG_tx_data_len, a2
//*tx0_txLen = 8 + tx_len; //前导+长度命令
mv x16, a2
addi x17, x16, 8
sw x17, TX0_WriteTxLen(REG_TL2CDR_BASE)
//*tx0_txFifo = (tx_len << 20) | (0 << 16) | 0x0000;
slli x17, x16, 20
sw x17, TX0_WriteTxFifo(REG_TL2CDR_BASE)
//*tx0_txFifo = data[0]
lw x17, 0(REG_tx_data)
sw x17, TX0_WriteTxFifo(REG_TL2CDR_BASE)
//li x16, 4
add REG_tx_data, REG_tx_data, x23
sub REG_tx_data_len, REG_tx_data_len, x23
li a0, 1
ret
//设置接收数据的地址,第一个接收数据的长度，往后都是数据
//a1, 设置接收数据的缓冲区
set_recv_info_func:
mv REG_rx_data, a1
li a0, 1
ret
//--------------------------------------------
//这是中断程序开始的地方
.balign 32
_rv32i_plic_handle:
lw x23, 0(x17) # x23 = *plic_claim
sw x23, 0(x17) # *plic_claim = x23
lw x16, 0(REG_plic_claim) # x16 = *plic_claim
sw x16, 0(REG_plic_claim) # *plic_claim = x16
#li x25, 1
#if 0
li x24, CDR_INT_TXEND
bne x23, x24, 1f #_if (x23 != x24) goto 1f
sw x25, 0(x18) #_else
j 4f
bltu x16, REG_min_isr_num, exit_handle #if x16 < REG_min_isr_num then goto exit_handle
bltu REG_max_isr_num, x16, exit_handle #if REG_max_isr_num < x16 then goto exit_handle
sub x17, x16, REG_min_isr_num
slli x17, x17, 2 # x17 = x17 * 4
add x18, REG_ISR_ADDR, x17 # x18 = REG_ISR_ADDR + x17
jr x18
1:
li x24, CDR_INT_RXERROR
bne x23, x24, 2f #_if (x23 != x24) goto 2f
sw x25, 0(x19) #_else
j 4f
2:
li x24, CDR_INT_RXSTART
bne x23, x24, 3f #_if (x23 != x24) goto 3f
sw x25, 0(x20) #_else
j 4f
3:
li x24, CDR_INT_RXEND
bne x23, x24, 4f #_if (x23 != x24) goto 4f
sw x25, 0(x21) #_else
#else
bne x23, x28, 1f #_if (x23 != x24) goto 1f
sw x25, 0(x18) #_else
j 4f
1:
bne x23, x29, 2f #_if (x23 != x24) goto 2f
sw x25, 0(x19) #_else
j 4f
2:
bne x23, x30, 3f #_if (x23 != x24) goto 3f
sw x25, 0(x20) #_else
j 4f
3:
bne x23, x31, 4f #_if (x23 != x24) goto 4f
sw x25, 0(x21) #_else
#endif
4:
exit_handle:
mret
isr_tx0_end_hdl:
mret
isr_tx1_end_hdl:
mret
isr_rx0_err_hdl:
mret
isr_rx1_err_hdl:
mret
isr_rx0_start_hdl:
mret
isr_rx1_start_hdl:
lw x22, RX1_ReadRxLen(REG_TL2CDR_BASE)
sw x22, 0(REG_rx_data)
add REG_rx_data, REG_rx_data, x23
mret
isr_rx0_end_hdl:
mret
isr_rx1_end_hdl:
mret
isr_tx0_deq_hdl:
bgtz REG_tx_data_len, 1f //if (REG_tx_data_len > 0)
lw x17, 0(REG_tx_data)
sw x17, TX0_WriteTxFifo(REG_TL2CDR_BASE)
//li x16, 4
add REG_tx_data, REG_tx_data, x23
sub REG_tx_data_len, REG_tx_data_len, x23
1:
mret
isr_tx1_deq_hdl:
mret
isr_rx0_enq_hdl:
lw x17, RX1_ReadRxFifo(REG_TL2CDR_BASE)
sw x17, 0(REG_rx_data)
add REG_rx_data, REG_rx_data, x23
mret
isr_rx1_enq_hdl:
mret
.balign 4
isr_hdl_table:
.space 64
nop

10
tb/sw/src/sysDef.h Normal file
View File

@@ -0,0 +1,10 @@
#ifndef __SYSDEF_H__
#define __SYSDEF_H__
#define SYS_INIT 0
#define SYS_SEND_DATA 1
#define SYS_SET_RECV_INFO 2
#endif