eb001/tb/shinTest/ShinTopSpiTb.v

`timescale 1 ns / 1 ps


module ShinTopSpiTb(

);

    reg clock;
    reg reset;
    reg clk8x;

    wire [3:0] dDat_w;
    wire [3:0] uDat_w;

    wire spi_sck;
    wire spi_mosi;
    wire [4:0] spi_miso;
    reg [14:0] spi_csn;

    wire qspi_sck;
    wire [3:0] qspi_mosi;
    wire [40-1:0] qspi_miso;

    wire isResp;

    integer spidata_file;
    integer c_line;

ShinTop s_ShinTop_Mst(
  .clock(clock),
  .reset(reset),

  .io_clk8x(clk8x),
  .io_dDatIn(1'b0),
  .io_dDatOut(dDat_w[0]),
  .io_uDatIn(uDat_w[0]),
  .io_uDatOut(),
  
  .io_iqspi_sck(qspi_sck),
  .io_iqspi_mosi(qspi_mosi),
  .io_iqspi_miso(qspi_miso[3:0]),
  .io_iqspi_isDirIn(),
  .io_iqspi_csn(spi_csn[0]),

  .io_ospi_sck (spi_sck),
  .io_ospi_mosi(spi_mosi),
  .io_ospi_miso(spi_miso[0]),
  .io_ospi_csn (spi_csn[5]),


  .io_oqspi_sck(qspi_sck),
  .io_oqspi_mosi(qspi_mosi),
  .io_oqspi_miso(qspi_miso[4*5+3:4*5]),
  .io_oqspi_isDirIn(),
  .io_oqspi_csn(spi_csn[10]),

  .io_rsp_valid(isResp),
  .io_rsp_bits_isError(),
  .io_rsp_bits_length()
);

ShinTop s_ShinTop_slv0(
  .clock(clock),
  .reset(reset),

  .io_clk8x(clk8x),
  .io_dDatIn(dDat_w[0]),
  .io_dDatOut(dDat_w[1]),
  .io_uDatIn(uDat_w[1]),
  .io_uDatOut(uDat_w[0]),
  
  .io_iqspi_sck(qspi_sck),
  .io_iqspi_mosi(qspi_mosi),
  .io_iqspi_miso(qspi_miso[4*1+3:4*1]),
  .io_iqspi_isDirIn(),
  .io_iqspi_csn(spi_csn[1]),

  .io_ospi_sck (spi_sck),
  .io_ospi_mosi(spi_mosi),
  .io_ospi_miso(spi_miso[1]),
  .io_ospi_csn (spi_csn[6]),

  .io_oqspi_sck(qspi_sck),
  .io_oqspi_mosi(qspi_mosi),
  .io_oqspi_miso(qspi_miso[4*6+3:4*6]),
  .io_oqspi_isDirIn(),
  .io_oqspi_csn(spi_csn[11]),

  .io_rsp_valid(),
  .io_rsp_bits_isError(),
  .io_rsp_bits_length()
);

ShinTop s_ShinTop_slv1(
  .clock(clock),
  .reset(reset),

  .io_clk8x(clk8x),
  .io_dDatIn(dDat_w[1]),
  .io_dDatOut(dDat_w[2]),
  .io_uDatIn(uDat_w[2]),
  .io_uDatOut(uDat_w[1]),
  
  .io_iqspi_sck(qspi_sck),
  .io_iqspi_mosi(qspi_mosi),
  .io_iqspi_miso(qspi_miso[4*2+3:4*2]),
  .io_iqspi_isDirIn(),
  .io_iqspi_csn(spi_csn[2]),

  .io_ospi_sck (spi_sck),
  .io_ospi_mosi(spi_mosi),
  .io_ospi_miso(spi_miso[2]),
  .io_ospi_csn (spi_csn[7]),

  .io_oqspi_sck(qspi_sck),
  .io_oqspi_mosi(qspi_mosi),
  .io_oqspi_miso(qspi_miso[4*7+3:4*7]),
  .io_oqspi_isDirIn(),
  .io_oqspi_csn(spi_csn[12]),

  .io_rsp_valid(),
  .io_rsp_bits_isError(),
  .io_rsp_bits_length()
);

ShinTop s_ShinTop_slv2(
  .clock(clock),
  .reset(reset),

  .io_clk8x(clk8x),
  .io_dDatIn(dDat_w[2]),
  .io_dDatOut(dDat_w[3]),
  .io_uDatIn(uDat_w[3]),
  .io_uDatOut(uDat_w[2]),
  
  .io_iqspi_sck(qspi_sck),
  .io_iqspi_mosi(qspi_mosi),
  .io_iqspi_miso(qspi_miso[4*3+3:4*3]),
  .io_iqspi_isDirIn(),
  .io_iqspi_csn(spi_csn[3]),

  .io_ospi_sck (spi_sck),
  .io_ospi_mosi(spi_mosi),
  .io_ospi_miso(spi_miso[3]),
  .io_ospi_csn (spi_csn[8]),

  .io_oqspi_sck(qspi_sck),
  .io_oqspi_mosi(qspi_mosi),
  .io_oqspi_miso(qspi_miso[4*8+3:4*8]),
  .io_oqspi_isDirIn(),
  .io_oqspi_csn(spi_csn[13]),

  .io_rsp_valid(),
  .io_rsp_bits_isError(),
  .io_rsp_bits_length()
);

ShinTop s_ShinTop_slv3(
  .clock(clock),
  .reset(reset),

  .io_clk8x(clk8x),
  .io_dDatIn(dDat_w[3]),
  .io_dDatOut(),
  .io_uDatIn(1'b0),
  .io_uDatOut(uDat_w[3]),

  .io_iqspi_sck(qspi_sck),
  .io_iqspi_mosi(qspi_mosi),
  .io_iqspi_miso(qspi_miso[4*4+3:4*4]),
  .io_iqspi_isDirIn(),
  .io_iqspi_csn(spi_csn[4]),

  .io_ospi_sck (spi_sck),
  .io_ospi_mosi(spi_mosi),
  .io_ospi_miso(spi_miso[4]),
  .io_ospi_csn (spi_csn[9]),

  .io_oqspi_sck(qspi_sck),
  .io_oqspi_mosi(qspi_mosi),
  .io_oqspi_miso(qspi_miso[4*9+3:4*9]),
  .io_oqspi_isDirIn(),
  .io_oqspi_csn(spi_csn[14]),

  .io_rsp_valid(),
  .io_rsp_bits_isError(),
  .io_rsp_bits_length()
);









initial begin
	clock = 0;
  clk8x = 0;
	reset = 0;

  spi_csn  = ~15'b0;

	#100
	reset <= 1;

	#240
	reset <= 0;

#20000000
	$display("Time Out !!!");
  	$fclose(spidata_file);
	$stop;
end

initial begin
	forever begin #20 clk8x <= ~clk8x; end
end

initial begin
	forever begin #80 clock <= ~clock; end
end

initial
begin
  	spidata_file = $fopen("spi_trans_data.txt", "w");
  	if (!spidata_file) $display("文件打开失败");
	$dumpfile("./tb/build/wave.vcd"); //生成的vcd文件名称
	$dumpvars(0, ShinTopSpiTb);//tb模块名称
end























  `define SCKFRE #640

  reg sck = 0;
  
  initial begin
      forever begin 
        `SCKFRE sck <= ~sck;
      end
  end

  assign spi_sck  = sck;
  assign qspi_sck = sck;


  reg [7:0] txBuf[0:2047];
  reg [7:0] rxBuf[0:2047];
  reg [7:0] exChangeRego;
  reg [7:0] exChangeRegi;



  assign spi_mosi = exChangeRego[7];
  assign qspi_mosi = exChangeRego[7:4];

  wire [3:0] qspi_mux_miso = 
    ( qspi_miso[4*0+3:4*0] & ~{4{spi_csn[ 0]}}) |
    ( qspi_miso[4*1+3:4*1] & ~{4{spi_csn[ 1]}}) |
    ( qspi_miso[4*2+3:4*2] & ~{4{spi_csn[ 2]}}) |
    ( qspi_miso[4*3+3:4*3] & ~{4{spi_csn[ 3]}}) |
    ( qspi_miso[4*4+3:4*4] & ~{4{spi_csn[ 4]}}) |
    ( qspi_miso[4*5+3:4*5] & ~{4{spi_csn[10]}}) |
    ( qspi_miso[4*6+3:4*6] & ~{4{spi_csn[11]}}) |
    ( qspi_miso[4*7+3:4*7] & ~{4{spi_csn[12]}}) |
    ( qspi_miso[4*8+3:4*8] & ~{4{spi_csn[13]}}) |
    ( qspi_miso[4*9+3:4*9] & ~{4{spi_csn[14]}});

  wire spi_mux_miso = 
    ( spi_miso[0] & ~spi_csn[5] ) |
    ( spi_miso[1] & ~spi_csn[6] ) |
    ( spi_miso[2] & ~spi_csn[7] ) |
    ( spi_miso[3] & ~spi_csn[8] ) |
    ( spi_miso[4] & ~spi_csn[9] );

  reg isReq = 0;
  reg isBusy = 0;

  reg [11:0] length;
  reg [7:0] idx;

  reg [11:0] transCnt;
  reg [11:0] byteCnt;
  reg [2:0] bitCnt;


always @(posedge clock) begin
  if( isReq & sck == 0 ) begin
    isBusy   <= #5 1'b1;
    transCnt <= #5 0;

    byteCnt <= #5 ~12'b0;
    bitCnt  <= #5 ~3'b0;

    spi_csn[idx] <= #5 1'b0;
    exChangeRego <= txBuf[0];
  end
end


wire isQspi = (idx >= 0 && idx <= 4) || idx >= 10;
wire [11:0] nextByteCnt = byteCnt + 1;

//输出
always @(negedge sck) begin
  if( isBusy ) begin      
    if( &bitCnt ) begin
      if( txBuf[2] === 1 & nextByteCnt >= 3) begin
        exChangeRego <= isQspi ? exChangeRego << 4 : exChangeRego << 1;
      end else begin
        exChangeRego <= txBuf[nextByteCnt];
      end
    end else begin
      if( isQspi ) begin
        exChangeRego <= isQspi ? exChangeRego << 4 : exChangeRego << 1;
      end
    end
  end
end

//输入
always @(posedge sck) begin
  if( isBusy ) begin
    if( transCnt <= length ) begin
      if( isQspi ) begin
        bitCnt <= ~bitCnt;
      end else begin
        bitCnt <= bitCnt + 1;
      end
      
      if( &bitCnt ) begin
        byteCnt <= byteCnt +1;
        transCnt <= transCnt + 1;
        if( txBuf[2] === 1 & nextByteCnt >= 4) begin
          rxBuf[byteCnt] <= exChangeRegi;
          $display("spi read out %x", exChangeRegi);
        end
        if( txBuf[2] === 1 & nextByteCnt >= 3) begin
          exChangeRegi <= isQspi ? {exChangeRegi[3:0], qspi_mux_miso} : {exChangeRegi[6:0], spi_mux_miso};
        end else begin
          exChangeRegi <= 0;
        end
      end else begin
        if( isQspi ) begin
          exChangeRegi <= isQspi ? {exChangeRegi[3:0], qspi_mux_miso} : {exChangeRegi[6:0], spi_mux_miso};
        end

      end
    end else begin
      isBusy       <= #5 1'b0;
      spi_csn[idx] <= #5 1'b1;
    end
  end
end




//mst slv0~slv3的 内部qspi调用即设置
//sidx为0~4；外部spi为5~9，外部qspi为10~15
task spi_trans( input [15:0] saddress, input [7:0] scmd, input [12:0] slength,input [7:0] sidx );
  begin
    txBuf[0] <= saddress[7:0];
    txBuf[1] <= saddress[15:8];
    txBuf[2] <= scmd;

    length <= slength + 3;
    idx <= sidx;

    #5
    @(negedge sck)
    isReq <= 1;
    @(posedge sck) #5
    isReq <= 0;

    @( negedge isBusy) #1000
    begin 
      //$fwrite(spidata_file, "------------%5t------------\n", $time);
      $fwrite(spidata_file, "T:%2tns \tdev:%4d, addr:0x%02h%02h, %s, len:%4d\n", 
          $time/1000, sidx, txBuf[1], txBuf[0], 
          ((txBuf[2] == 0)? "Write":" Read"), slength);

      for (integer i=0; i<slength; i++) begin
        if (scmd == 0) begin
          $fwrite(spidata_file, "%02h ", txBuf[i + 3]); 
        end else begin
          $fwrite(spidata_file, "%02h ", rxBuf[i + 3]); 
        end
        c_line = 0;
        if ((i+1)%16 == 0) begin
          $fwrite(spidata_file, "\n");
          c_line = 1;
        end
      end
      
      if (c_line == 0) begin
        $fwrite(spidata_file, "\n");
      end
      c_line = 0;
    end
  end

endtask



`define INTERFACE_IDX       0 //internal spi
`define IF_IDX(idx)         ((`INTERFACE_IDX)+(idx))
`define IF_IQSPI(idx)       ((idx))
`define IF_OQSPI(idx)       ((10) + (idx))
`define IF_OSPI(idx)        ((5) + (idx))
`define SPI_WRITE           8'h0
`define SPI_READ            8'h1

initial begin

  #1000
  $fdisplay(spidata_file, "测试用例1-从IP中读取寄存器，上电后的寄存器期望值为0");
  //spi_trans( (16'h00), (`SPI_READ), (1024), (`IF_IQSPI(0)) );
  //spi_trans( (16'h400), (`SPI_READ), (1024), (`IF_IQSPI(0)) );
  spi_trans( (16'h00), (`SPI_READ), (64), (`IF_IQSPI(0)) );
  spi_trans( (16'h00), (`SPI_READ), (64), (`IF_IQSPI(1)) );
  spi_trans( (16'h00), (`SPI_READ), (64), (`IF_IQSPI(2)) );
  spi_trans( (16'h00), (`SPI_READ), (64), (`IF_IQSPI(3)) );
  spi_trans( (16'h00), (`SPI_READ), (64), (`IF_IQSPI(4)) );


  if ((`INTERFACE_IDX) == 5) begin
    $fdisplay(spidata_file, "\n\n从内部QSPI配置使用外部的SPI接口访问EasyBus");
    txBuf[0+3] = 8'h01;
    spi_trans( (16'h09), (`SPI_WRITE), (1), (`IF_IQSPI(0)) );
    spi_trans( (16'h09), (`SPI_WRITE), (1), (`IF_IQSPI(1)) );
    spi_trans( (16'h09), (`SPI_WRITE), (1), (`IF_IQSPI(2)) );
    spi_trans( (16'h09), (`SPI_WRITE), (1), (`IF_IQSPI(3)) );
    spi_trans( (16'h09), (`SPI_WRITE), (1), (`IF_IQSPI(4)) );
  end else if ((`INTERFACE_IDX) == 10) begin
    $fdisplay(spidata_file, "\n\n从内部QSPI配置使用外部的QSPI接口访问EasyBus");
    txBuf[0+3] = 8'h02;
    spi_trans( (16'h09), (`SPI_WRITE), (1), (`IF_IQSPI(0)) );
    spi_trans( (16'h09), (`SPI_WRITE), (1), (`IF_IQSPI(1)) );
    spi_trans( (16'h09), (`SPI_WRITE), (1), (`IF_IQSPI(2)) );
    spi_trans( (16'h09), (`SPI_WRITE), (1), (`IF_IQSPI(3)) );
    spi_trans( (16'h09), (`SPI_WRITE), (1), (`IF_IQSPI(4)) );
  end else begin
    $fdisplay(spidata_file, "\n\n从内部QSPI接口访问EasyBus");
  end


  //设置主站从站
  $fdisplay(spidata_file, "\n\n测试用例2-设置IP为主站或从站，并读取设置结果，期望：0主，1~4从");
  txBuf[0+3] = 8'h01;
  spi_trans( (16'h00), (`SPI_WRITE), (1), (`IF_IDX(0)) );

  #1000
  txBuf[0+3] = 8'h02;
  spi_trans( (16'h0), (`SPI_WRITE), (1), (`IF_IDX(1)) );
  
  #1000
  spi_trans( (16'h0), (`SPI_WRITE), (1), (`IF_IDX(2)) );
  
  #1000
  spi_trans( (16'h0), (`SPI_WRITE), (1), (`IF_IDX(3)) );
  
  #1000
  spi_trans( (16'h0), (`SPI_WRITE), (1), (`IF_IDX(4)) );

  $fdisplay(spidata_file, "--->>>设置完毕，检查接口寄存器");
  spi_trans( (16'h00), (`SPI_READ), (1), (`IF_IDX(0)) );
  spi_trans( (16'h00), (`SPI_READ), (1), (`IF_IDX(1)) );
  spi_trans( (16'h00), (`SPI_READ), (1), (`IF_IDX(2)) );
  spi_trans( (16'h00), (`SPI_READ), (1), (`IF_IDX(3)) );
  spi_trans( (16'h00), (`SPI_READ), (1), (`IF_IDX(4)) );

  //测试用例：

  //嗅探
  #10000
  $fdisplay(spidata_file, "\n\n测试用例3-发送嗅探包，需要在波形文件里检查");
  begin
    $fdisplay(spidata_file, "--->>>嗅探前，检查链路状态寄存器");
    //spi_trans( (16'h00c0), (`SPI_READ), (6), (`IF_IDX(0)) );
    spi_trans( (16'h00c0), (`SPI_READ), (6), (`IF_IDX(1)) );
    spi_trans( (16'h00c0), (`SPI_READ), (6), (`IF_IDX(2)) );
    spi_trans( (16'h00c0), (`SPI_READ), (6), (`IF_IDX(3)) );
    spi_trans( (16'h00c0), (`SPI_READ), (6), (`IF_IDX(4)) );

    $fdisplay(spidata_file, "--->>>嗅探");
    //设置SM1在写入0x3地址触发enq
    txBuf[0+3] = 8'h03;
    txBuf[1+3] = 8'h00;
    spi_trans( (16'h0202), (`SPI_WRITE), (2), (`IF_IDX(0)) );

    //无子报文
    `include "detect_pkt.vh"
    spi_trans( (16'h1000), (`SPI_WRITE), (4), (`IF_IDX(0)) ); //写入SM1

    //发布请求
    txBuf[0+3] = 8'h04;
    txBuf[1+3] = 8'h00;
    spi_trans( (16'h21), (`SPI_WRITE), (2), (`IF_IDX(0)) );//写入长度

    txBuf[0+3] = 8'h01;
    spi_trans( (16'h20), (`SPI_WRITE), (1), (`IF_IDX(0)) );//发送SM0 接收SM0, 请求发送
    @(posedge isResp) #5 begin end

  end





  // 顺序索引
  #50000
  #50000
  #50000
  $fdisplay(spidata_file, "--->>>嗅探后，检查链路状态寄存器");
  //spi_trans( (16'h00c0), (`SPI_READ), (6), (`IF_IDX(0)) );
  spi_trans( (16'h00c0), (`SPI_READ), (6), (`IF_IDX(1)) );
  spi_trans( (16'h00c0), (`SPI_READ), (6), (`IF_IDX(2)) );
  spi_trans( (16'h00c0), (`SPI_READ), (6), (`IF_IDX(3)) );
  spi_trans( (16'h00c0), (`SPI_READ), (6), (`IF_IDX(4)) );

  
  $fdisplay(spidata_file, "\n\n测试用例4-设置顺序索引");
  $display("index @ %d", s_ShinTop_Mst.interface__io_cReg_timeStamp);

  begin
    $fdisplay(spidata_file, "--->>>设置顺序地址前，检查顺序地址");
    //spi_trans( (16'h0010), (`SPI_READ), (5), (`IF_IDX(0)) );
    spi_trans( (16'h0000), (`SPI_READ), (16), (`IF_IDX(1)) );
    spi_trans( (16'h0000), (`SPI_READ), (16), (`IF_IDX(2)) );
    spi_trans( (16'h0000), (`SPI_READ), (16), (`IF_IDX(3)) );
    spi_trans( (16'h0000), (`SPI_READ), (16), (`IF_IDX(4)) );


    $fdisplay(spidata_file, "--->>>设置顺序地址");
    //设置SM1在写入0xd地址触发enq
    txBuf[0+3] = 8'h0d;
    txBuf[1+3] = 8'h00;
    spi_trans( (16'h0202), (`SPI_WRITE), (2), (`IF_IDX(0)) );

    txBuf[0+3] = 8'h00;
    txBuf[1+3] = 8'ha0;//heeader length 10
    txBuf[2+3] = 8'h00;
    txBuf[3+3] = 8'h00;

    //子报文
    //设置顺序地址
    txBuf[4+3] = 8'h0; //设备索引
    txBuf[5+3] = 8'h0; //设备索引、类型
    txBuf[6+3] = $random; //地址
    txBuf[7+3] = $random; //地址
    txBuf[8+3] = 8'hd0;   //命令d 负载长度2
    txBuf[9+3] = 8'd02;   //负载长度2
    txBuf[10+3] = 8'h0;   //工作计数0
    txBuf[11+3] = 8'h0;   //工作计数0

    txBuf[12+3] = 8'h0;   //负载
    txBuf[13+3] = 8'h0;   //负载
    spi_trans( (16'h1000), (`SPI_WRITE), (14), (`IF_IDX(0)) ); //写入SM1



    //发布请求
    txBuf[0+3] = 8'h0e;
    txBuf[1+3] = 8'h00;
    spi_trans( (16'h21), (`SPI_WRITE), (2), (`IF_IDX(0)) );//写入长度

    txBuf[0+3] = 8'h01;
    spi_trans( (16'h20), (`SPI_WRITE), (1), (`IF_IDX(0)) );//发送SM0 接收SM0, 请求发送
    @(posedge isResp) #5 begin end
  end


  //测试
  spi_trans( (16'hc0), (`SPI_READ), (6), (`IF_IDX(3)) );
  spi_trans( (16'h0a), (`SPI_READ), (2), (`IF_IDX(1)) );
  spi_trans( (16'h0a), (`SPI_READ), (2), (`IF_IDX(2)) );
  spi_trans( (16'h0a), (`SPI_READ), (2), (`IF_IDX(3)) );
  spi_trans( (16'h0a), (`SPI_READ), (2), (`IF_IDX(4)) );


  //读写
  #50000
  #50000
  #50000
  #50000
  $fdisplay(spidata_file, "--->>>设置顺序地址后，检查顺序地址");
  //spi_trans( (16'h0010), (`SPI_READ), (5), (`IF_IDX(0)) );
  spi_trans( (16'h0000), (`SPI_READ), (16), (`IF_IDX(1)) );
  spi_trans( (16'h0000), (`SPI_READ), (16), (`IF_IDX(2)) );
  spi_trans( (16'h0000), (`SPI_READ), (16), (`IF_IDX(3)) );
  spi_trans( (16'h0000), (`SPI_READ), (16), (`IF_IDX(4)) );

  $fdisplay(spidata_file, "\n\n测试用例5-交换数据");
  $display("read&write @ %d", s_ShinTop_Mst.interface__io_cReg_timeStamp);
  begin

    //设置SM1在写入516地址触发enq
    txBuf[0+3] = 8'h03;
    txBuf[1+3] = 8'h02;
    spi_trans( (16'h0202), (`SPI_WRITE), (2), (`IF_IDX(0)) );

    `include "seq_pkt.vh"
    spi_trans( (16'h1000), (`SPI_WRITE), (516), (`IF_IDX(0)) ); //写入SM1



    //发布请求
    txBuf[0+3] = 8'h04;
    txBuf[1+3] = 8'h02;
    spi_trans( (16'h21), (`SPI_WRITE), (2), (`IF_IDX(0)) );//写入长度

    txBuf[0+3] = 8'h01;
    spi_trans( (16'h20), (`SPI_WRITE), (1), (`IF_IDX(0)) );//发送SM0 接收SM0, 请求发送
    @(posedge isResp) #5 begin end
  end



  // 同步
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  $display("sync @ %d", s_ShinTop_Mst.interface__io_cReg_timeStamp);
  begin



    //设置SM1在写入0x3地址触发enq
    txBuf[0+3] = 8'h17;
    txBuf[1+3] = 8'h00;
    spi_trans( (16'h0202), (`SPI_WRITE), (2), (`IF_IDX(0)) );

    `include "sync_pkt.vh"
    spi_trans( (16'h1000), (`SPI_WRITE), (24), (`IF_IDX(0)) ); //写入SM1

    //写入替换时间戳替换地址
    txBuf[0+3] = 8'h0c;
    txBuf[1+3] = 8'hc0;
    spi_trans( (16'h24), (`SPI_WRITE), (2), (`IF_IDX(0)) ); //写入替换时间戳替换地址寄存器

    //发布请求
    txBuf[0+3] = 8'h18;
    txBuf[1+3] = 8'h00;
    spi_trans( (16'h21), (`SPI_WRITE), (2), (`IF_IDX(0)) );//写入长度

    txBuf[0+3] = 8'h01;
    spi_trans( (16'h20), (`SPI_WRITE), (1), (`IF_IDX(0)) );//发送SM0 接收SM0, 请求发送
    @(posedge isResp) #5 begin end

    //清除替换时间戳替换地址
    txBuf[0+3] = 8'h00;
    txBuf[1+3] = 8'h00;
    spi_trans( (16'h25), (`SPI_WRITE), (2), (`IF_IDX(0)) ); //清除替换时间戳替换地址寄存器



    //设定sync信号

    //设置SM1在写入51地址触发enq
    txBuf[0+3] = 8'd51;
    txBuf[1+3] = 8'h00;
    spi_trans( (16'h0202), (`SPI_WRITE), (2), (`IF_IDX(0)) );

    `include "sync_sig_pkt.vh"
    spi_trans( (16'h1000), (`SPI_WRITE), (52), (`IF_IDX(0)) ); //写入SM1

    //发布请求
    txBuf[0+3] = 8'd52;
    txBuf[1+3] = 8'h00;
    spi_trans( (16'h21), (`SPI_WRITE), (2), (`IF_IDX(0)) );//写入长度

    txBuf[0+3] = 8'h01;
    spi_trans( (16'h20), (`SPI_WRITE), (1), (`IF_IDX(0)) );//发送SM0 接收SM0, 请求发送
    @(posedge isResp) #5 begin end

  end

  //清脉冲
    //设置SM1在写入19地址触发enq
    txBuf[0+3] = 0;  //负载0x122 sync0脉冲宽度
    txBuf[1+3] = 0;  //负载0x123
    txBuf[2+3] = 0;  //负载0x124 sync1脉冲宽度
    txBuf[3+3] = 0;  //负载0x125
    txBuf[4+3] = 0;  //负载0x126 sync2脉冲宽度
    txBuf[5+3] = 0;  //负载0x127 
    txBuf[6+3] = 0;  //负载0x128 sync3脉冲宽度
    txBuf[7+3] = 0;  //负载0x129
    spi_trans( (16'h0122), (`SPI_WRITE), (8), (`IF_IDX(2)) ); //slv2



end


endmodule