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eb001/tb/shinTest/ShinTopSpiTb.v

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`timescale 1 ns / 1 ps
module ShinTopSpiTb(
);
reg clock;
reg reset;
reg clk8x;
wire [3:0] dDat_w;
wire [3:0] uDat_w;
wire spi_sck;
wire spi_mosi;
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wire [4:0] spi_miso;
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reg [14:0] spi_csn;
wire qspi_sck;
wire [3:0] qspi_mosi;
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wire [40-1:0] qspi_miso;
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wire isResp;
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integer spidata_file;
integer c_line;
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ShinTop s_ShinTop_Mst(
.clock(clock),
.reset(reset),
.io_clk8x(clk8x),
.io_dDatIn(1'b0),
.io_dDatOut(dDat_w[0]),
.io_uDatIn(uDat_w[0]),
.io_uDatOut(),
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.io_iqspi_sck(qspi_sck),
.io_iqspi_mosi(qspi_mosi),
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.io_iqspi_miso(qspi_miso[3:0]),
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.io_iqspi_isDirIn(),
.io_iqspi_csn(spi_csn[0]),
.io_ospi_sck (spi_sck),
.io_ospi_mosi(spi_mosi),
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.io_ospi_miso(spi_miso[0]),
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.io_ospi_csn (spi_csn[5]),
.io_oqspi_sck(qspi_sck),
.io_oqspi_mosi(qspi_mosi),
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.io_oqspi_miso(qspi_miso[4*5+3:4*5]),
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.io_oqspi_isDirIn(),
.io_oqspi_csn(spi_csn[10]),
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.io_rsp_valid(isResp),
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.io_rsp_bits_isError(),
.io_rsp_bits_length()
);
ShinTop s_ShinTop_slv0(
.clock(clock),
.reset(reset),
.io_clk8x(clk8x),
.io_dDatIn(dDat_w[0]),
.io_dDatOut(dDat_w[1]),
.io_uDatIn(uDat_w[1]),
.io_uDatOut(uDat_w[0]),
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.io_iqspi_sck(qspi_sck),
.io_iqspi_mosi(qspi_mosi),
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.io_iqspi_miso(qspi_miso[4*1+3:4*1]),
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.io_iqspi_isDirIn(),
.io_iqspi_csn(spi_csn[1]),
.io_ospi_sck (spi_sck),
.io_ospi_mosi(spi_mosi),
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.io_ospi_miso(spi_miso[1]),
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.io_ospi_csn (spi_csn[6]),
.io_oqspi_sck(qspi_sck),
.io_oqspi_mosi(qspi_mosi),
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.io_oqspi_miso(qspi_miso[4*6+3:4*6]),
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.io_oqspi_isDirIn(),
.io_oqspi_csn(spi_csn[11]),
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.io_rsp_valid(),
.io_rsp_bits_isError(),
.io_rsp_bits_length()
);
ShinTop s_ShinTop_slv1(
.clock(clock),
.reset(reset),
.io_clk8x(clk8x),
.io_dDatIn(dDat_w[1]),
.io_dDatOut(dDat_w[2]),
.io_uDatIn(uDat_w[2]),
.io_uDatOut(uDat_w[1]),
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.io_iqspi_sck(qspi_sck),
.io_iqspi_mosi(qspi_mosi),
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.io_iqspi_miso(qspi_miso[4*2+3:4*2]),
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.io_iqspi_isDirIn(),
.io_iqspi_csn(spi_csn[2]),
.io_ospi_sck (spi_sck),
.io_ospi_mosi(spi_mosi),
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.io_ospi_miso(spi_miso[2]),
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.io_ospi_csn (spi_csn[7]),
.io_oqspi_sck(qspi_sck),
.io_oqspi_mosi(qspi_mosi),
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.io_oqspi_miso(qspi_miso[4*7+3:4*7]),
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.io_oqspi_isDirIn(),
.io_oqspi_csn(spi_csn[12]),
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.io_rsp_valid(),
.io_rsp_bits_isError(),
.io_rsp_bits_length()
);
ShinTop s_ShinTop_slv2(
.clock(clock),
.reset(reset),
.io_clk8x(clk8x),
.io_dDatIn(dDat_w[2]),
.io_dDatOut(dDat_w[3]),
.io_uDatIn(uDat_w[3]),
.io_uDatOut(uDat_w[2]),
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.io_iqspi_sck(qspi_sck),
.io_iqspi_mosi(qspi_mosi),
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.io_iqspi_miso(qspi_miso[4*3+3:4*3]),
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.io_iqspi_isDirIn(),
.io_iqspi_csn(spi_csn[3]),
.io_ospi_sck (spi_sck),
.io_ospi_mosi(spi_mosi),
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.io_ospi_miso(spi_miso[3]),
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.io_ospi_csn (spi_csn[8]),
.io_oqspi_sck(qspi_sck),
.io_oqspi_mosi(qspi_mosi),
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.io_oqspi_miso(qspi_miso[4*8+3:4*8]),
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.io_oqspi_isDirIn(),
.io_oqspi_csn(spi_csn[13]),
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.io_rsp_valid(),
.io_rsp_bits_isError(),
.io_rsp_bits_length()
);
ShinTop s_ShinTop_slv3(
.clock(clock),
.reset(reset),
.io_clk8x(clk8x),
.io_dDatIn(dDat_w[3]),
.io_dDatOut(),
.io_uDatIn(1'b0),
.io_uDatOut(uDat_w[3]),
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.io_iqspi_sck(qspi_sck),
.io_iqspi_mosi(qspi_mosi),
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.io_iqspi_miso(qspi_miso[4*4+3:4*4]),
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.io_iqspi_isDirIn(),
.io_iqspi_csn(spi_csn[4]),
.io_ospi_sck (spi_sck),
.io_ospi_mosi(spi_mosi),
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.io_ospi_miso(spi_miso[4]),
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.io_ospi_csn (spi_csn[9]),
.io_oqspi_sck(qspi_sck),
.io_oqspi_mosi(qspi_mosi),
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.io_oqspi_miso(qspi_miso[4*9+3:4*9]),
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.io_oqspi_isDirIn(),
.io_oqspi_csn(spi_csn[14]),
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.io_rsp_valid(),
.io_rsp_bits_isError(),
.io_rsp_bits_length()
);
initial begin
clock = 0;
clk8x = 0;
reset = 0;
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spi_csn = ~15'b0;
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#100
reset <= 1;
#240
reset <= 0;
#10000000
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$display("Time Out !!!");
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$fclose(spidata_file);
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$stop;
end
initial begin
forever begin #20 clk8x <= ~clk8x; end
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end
initial begin
forever begin #80 clock <= ~clock; end
end
initial
begin
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spidata_file = $fopen("spi_trans_data.txt", "w");
if (!spidata_file) $display("文件打开失败");
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$dumpfile("./tb/build/wave.vcd"); //生成的vcd文件名称
$dumpvars(0, ShinTopSpiTb);//tb模块名称
end
`define SCKFRE #640
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reg sck = 0;
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initial begin
forever begin
`SCKFRE sck <= ~sck;
end
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end
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assign spi_sck = sck;
assign qspi_sck = sck;
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reg [7:0] txBuf[0:2047];
reg [7:0] rxBuf[0:2047];
reg [7:0] exChangeReg;
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assign spi_mosi = exChangeReg[7];
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assign qspi_mosi = exChangeReg[7:4];
wire [3:0] qspi_mux_miso =
( qspi_miso[4*0+3:4*0] & ~{4{spi_csn[ 0]}}) |
( qspi_miso[4*1+3:4*1] & ~{4{spi_csn[ 1]}}) |
( qspi_miso[4*2+3:4*2] & ~{4{spi_csn[ 2]}}) |
( qspi_miso[4*3+3:4*3] & ~{4{spi_csn[ 3]}}) |
( qspi_miso[4*4+3:4*4] & ~{4{spi_csn[ 4]}}) |
( qspi_miso[4*5+3:4*5] & ~{4{spi_csn[10]}}) |
( qspi_miso[4*6+3:4*6] & ~{4{spi_csn[11]}}) |
( qspi_miso[4*7+3:4*7] & ~{4{spi_csn[12]}}) |
( qspi_miso[4*8+3:4*8] & ~{4{spi_csn[13]}}) |
( qspi_miso[4*9+3:4*9] & ~{4{spi_csn[14]}});
wire spi_mux_miso =
( spi_miso[0] & ~spi_csn[5] ) |
( spi_miso[1] & ~spi_csn[6] ) |
( spi_miso[2] & ~spi_csn[7] ) |
( spi_miso[3] & ~spi_csn[8] ) |
( spi_miso[4] & ~spi_csn[9] );
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reg isReq = 0;
reg isBusy = 0;
reg [11:0] length;
reg [7:0] idx;
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reg [11:0] transCnt;
reg [11:0] byteCnt;
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reg [2:0] bitCnt;
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always @(posedge clock) begin
if( isReq & sck == 0 ) begin
isBusy <= #5 1'b1;
transCnt <= #5 0;
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byteCnt <= #5 ~12'b0;
bitCnt <= #5 ~3'b0;
spi_csn[idx] <= #5 1'b0;
exChangeReg <= txBuf[0];
end
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end
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wire isQspi = (idx >= 0 && idx <= 4) || idx >= 10;
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wire [11:0] nextByteCnt = byteCnt + 1;
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always @(posedge sck) begin
if( isBusy ) begin
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if( transCnt <= length ) begin
if( isQspi ) begin
bitCnt <= ~bitCnt;
end else begin
bitCnt <= bitCnt + 1;
end
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if( &bitCnt ) begin
byteCnt <= byteCnt +1;
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transCnt <= transCnt + 1;
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rxBuf[byteCnt] <= isQspi ? {exChangeReg[3:0], qspi_mux_miso} : {exChangeReg[6:0], spi_mux_miso};
if( txBuf[2] === 1 & nextByteCnt >= 4) begin
$display("spi read out @ %x", exChangeReg);
end
if( txBuf[2] === 1 & nextByteCnt >= 3) begin
exChangeReg <= isQspi ? {exChangeReg[3:0], qspi_mux_miso} : {exChangeReg[6:0], spi_mux_miso};
end else begin
exChangeReg <= txBuf[nextByteCnt];
end
end else begin
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if( isQspi ) begin
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exChangeReg <= {exChangeReg[3:0], qspi_mux_miso};
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end else begin
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exChangeReg <= {exChangeReg[6:0], spi_mux_miso};
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end
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end
end else begin
isBusy <= #5 1'b0;
spi_csn[idx] <= #5 1'b1;
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end
end
end
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//mst slv0~slv3的 内部qspi调用即设置
//sidx为0~4外部spi为5~9外部qspi为10~15
task spi_trans( input [15:0] saddress, input [7:0] scmd, input [12:0] slength,input [7:0] sidx );
begin
txBuf[0] <= saddress[7:0];
txBuf[1] <= saddress[15:8];
txBuf[2] <= scmd;
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length <= slength + 3;
idx <= sidx;
#5
@(negedge sck)
isReq <= 1;
@(posedge sck) #5
isReq <= 0;
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@( negedge isBusy) #1000
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begin
//$fwrite(spidata_file, "------------%5t------------\n", $time);
$fwrite(spidata_file, "T:%2tns \tdev:%4d, addr:0x%02h%02h, %s, len:%4d\n",
$time/1000, sidx, txBuf[1], txBuf[0],
((txBuf[2] == 0)? "Write":" Read"), slength);
if (scmd == 0) begin
for (integer i=0; i<slength; i++) begin
$fwrite(spidata_file, "%02h ", txBuf[i + 3]);
c_line = 0;
if ((i+1)%16 == 0) begin
$fwrite(spidata_file, "\n");
c_line = 1;
end
end
end else begin
for (integer i=0; i<slength; i++) begin
$fwrite(spidata_file, "%02h ", rxBuf[i + 3]);
c_line = 0;
if ((i+1)%16 == 0) begin
$fwrite(spidata_file, "\n");
c_line = 1;
end
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end
end
if (c_line == 0) begin
$fwrite(spidata_file, "\n");
end
c_line = 0;
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end
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end
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endtask
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`define INTERFACE_IDX 0 //internal spi
`define IF_IDX(idx) ((`INTERFACE_IDX)+(idx))
`define IF_IQSPI(idx) ((idx))
`define IF_OQSPI(idx) ((10) + (idx))
`define IF_OSPI(idx) ((5) + (idx))
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`define SPI_WRITE 8'h0
`define SPI_READ 8'h1
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initial begin
#1000
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$fdisplay(spidata_file, "测试用例1-从IP中读取寄存器上电后的寄存器期望值为0");
spi_trans( (16'h00), (`SPI_READ), (10), (`IF_IQSPI(0)) );
spi_trans( (16'h20), (`SPI_READ), (64), (`IF_IQSPI(0)) );
spi_trans( (16'h20), (`SPI_READ), (64), (`IF_IQSPI(1)) );
spi_trans( (16'h20), (`SPI_READ), (64), (`IF_IQSPI(2)) );
spi_trans( (16'h20), (`SPI_READ), (64), (`IF_IQSPI(3)) );
spi_trans( (16'h20), (`SPI_READ), (64), (`IF_IQSPI(4)) );
if ((`INTERFACE_IDX) == 5) begin
$fdisplay(spidata_file, "\n\n从内部QSPI配置使用外部的SPI接口访问EasyBus");
txBuf[0+3] = 8'h01;
spi_trans( (16'h09), (`SPI_WRITE), (1), (`IF_IQSPI(0)) );
spi_trans( (16'h09), (`SPI_WRITE), (1), (`IF_IQSPI(1)) );
spi_trans( (16'h09), (`SPI_WRITE), (1), (`IF_IQSPI(2)) );
spi_trans( (16'h09), (`SPI_WRITE), (1), (`IF_IQSPI(3)) );
spi_trans( (16'h09), (`SPI_WRITE), (1), (`IF_IQSPI(4)) );
end else if ((`INTERFACE_IDX) == 10) begin
$fdisplay(spidata_file, "\n\n从内部QSPI配置使用外部的QSPI接口访问EasyBus");
txBuf[0+3] = 8'h02;
spi_trans( (16'h09), (`SPI_WRITE), (1), (`IF_IQSPI(0)) );
spi_trans( (16'h09), (`SPI_WRITE), (1), (`IF_IQSPI(1)) );
spi_trans( (16'h09), (`SPI_WRITE), (1), (`IF_IQSPI(2)) );
spi_trans( (16'h09), (`SPI_WRITE), (1), (`IF_IQSPI(3)) );
spi_trans( (16'h09), (`SPI_WRITE), (1), (`IF_IQSPI(4)) );
end else begin
$fdisplay(spidata_file, "\n\n从内部QSPI接口访问EasyBus");
end
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//设置主站从站
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$fdisplay(spidata_file, "\n\n测试用例2-设置IP为主站或从站并读取设置结果期望0主1~4从");
txBuf[0+3] = 8'h01;
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spi_trans( (16'h00), (`SPI_WRITE), (1), (`IF_IDX(0)) );
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#1000
txBuf[0+3] = 8'h02;
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spi_trans( (16'h0), (`SPI_WRITE), (1), (`IF_IDX(1)) );
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#1000
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spi_trans( (16'h0), (`SPI_WRITE), (1), (`IF_IDX(2)) );
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#1000
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spi_trans( (16'h0), (`SPI_WRITE), (1), (`IF_IDX(3)) );
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#1000
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spi_trans( (16'h0), (`SPI_WRITE), (1), (`IF_IDX(4)) );
spi_trans( (16'h00), (`SPI_READ), (1), (`IF_IDX(0)) );
spi_trans( (16'h00), (`SPI_READ), (1), (`IF_IDX(1)) );
spi_trans( (16'h00), (`SPI_READ), (1), (`IF_IDX(2)) );
spi_trans( (16'h00), (`SPI_READ), (1), (`IF_IDX(3)) );
spi_trans( (16'h00), (`SPI_READ), (1), (`IF_IDX(4)) );
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//测试用例
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//嗅探
#10000
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$fdisplay(spidata_file, "\n\n测试用例3-发送嗅探包,需要在波形文件里检查");
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begin
$fdisplay(spidata_file, "--->>>嗅探前,检查链路状态寄存器");
//spi_trans( (16'h00c0), (`SPI_READ), (6), (`IF_IDX(0)) );
txBuf[0+3] = 8'h00;
txBuf[1+3] = 8'h00;
txBuf[2+3] = 8'h00;
txBuf[3+3] = 8'h00;
txBuf[4+3] = 8'h00;
txBuf[5+3] = 8'h00;
spi_trans( (16'h00c0), (`SPI_READ), (6), (`IF_IDX(1)) );
txBuf[0+3] = 8'h00;
txBuf[1+3] = 8'h00;
txBuf[2+3] = 8'h00;
txBuf[3+3] = 8'h00;
txBuf[4+3] = 8'h00;
txBuf[5+3] = 8'h00;
spi_trans( (16'h00c0), (`SPI_READ), (6), (`IF_IDX(2)) );
txBuf[0+3] = 8'h00;
txBuf[1+3] = 8'h00;
txBuf[2+3] = 8'h00;
txBuf[3+3] = 8'h00;
txBuf[4+3] = 8'h00;
txBuf[5+3] = 8'h00;
spi_trans( (16'h00c0), (`SPI_READ), (6), (`IF_IDX(3)) );
txBuf[0+3] = 8'h00;
txBuf[1+3] = 8'h00;
txBuf[2+3] = 8'h00;
txBuf[3+3] = 8'h00;
txBuf[4+3] = 8'h00;
txBuf[5+3] = 8'h00;
spi_trans( (16'h00c0), (`SPI_READ), (6), (`IF_IDX(4)) );
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$fdisplay(spidata_file, "--->>>嗅探");
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//设置SM1在写入0x3地址触发enq
txBuf[0+3] = 8'h03;
txBuf[1+3] = 8'h00;
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spi_trans( (16'h0202), (`SPI_WRITE), (2), (`IF_IDX(0)) );
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//无子报文
txBuf[0+3] = 8'h00;
txBuf[1+3] = 8'h01;//heeader length 0 嗅探包1
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txBuf[2+3] = 8'h3f;
txBuf[3+3] = 8'hff;
spi_trans( (16'h1000), (`SPI_WRITE), (4), (`IF_IDX(0)) ); //写入SM1
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//发布请求
txBuf[0+3] = 8'h04;
txBuf[1+3] = 8'h00;
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spi_trans( (16'h21), (`SPI_WRITE), (2), (`IF_IDX(0)) );//写入长度
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txBuf[0+3] = 8'h01;
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spi_trans( (16'h20), (`SPI_WRITE), (1), (`IF_IDX(0)) );//发送SM0 接收SM0, 请求发送
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@(posedge isResp) #5 begin end
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end
// 顺序索引
#50000
#50000
#50000
$fdisplay(spidata_file, "--->>>嗅探后,检查链路状态寄存器");
//spi_trans( (16'h00c0), (`SPI_READ), (6), (`IF_IDX(0)) );
txBuf[0+3] = 8'h00;
txBuf[1+3] = 8'h00;
txBuf[2+3] = 8'h00;
txBuf[3+3] = 8'h00;
txBuf[4+3] = 8'h00;
txBuf[5+3] = 8'h00;
spi_trans( (16'h00c0), (`SPI_READ), (6), (`IF_IDX(1)) );
txBuf[0+3] = 8'h00;
txBuf[1+3] = 8'h00;
txBuf[2+3] = 8'h00;
txBuf[3+3] = 8'h00;
txBuf[4+3] = 8'h00;
txBuf[5+3] = 8'h00;
spi_trans( (16'h00c0), (`SPI_READ), (6), (`IF_IDX(2)) );
txBuf[0+3] = 8'h00;
txBuf[1+3] = 8'h00;
txBuf[2+3] = 8'h00;
txBuf[3+3] = 8'h00;
txBuf[4+3] = 8'h00;
txBuf[5+3] = 8'h00;
spi_trans( (16'h00c0), (`SPI_READ), (6), (`IF_IDX(3)) );
txBuf[0+3] = 8'h00;
txBuf[1+3] = 8'h00;
txBuf[2+3] = 8'h00;
txBuf[3+3] = 8'h00;
txBuf[4+3] = 8'h00;
txBuf[5+3] = 8'h00;
spi_trans( (16'h00c0), (`SPI_READ), (6), (`IF_IDX(4)) );
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$fdisplay(spidata_file, "\n\n测试用例4-设置顺序索引");
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$display("index @ %d", s_ShinTop_Mst.interface__io_cReg_timeStamp);
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begin
$fdisplay(spidata_file, "--->>>设置顺序地址前,检查顺序地址");
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//spi_trans( (16'h0010), (`SPI_READ), (5), (`IF_IDX(0)) );
spi_trans( (16'h0000), (`SPI_READ), (16), (`IF_IDX(1)) );
spi_trans( (16'h0000), (`SPI_READ), (16), (`IF_IDX(2)) );
spi_trans( (16'h0000), (`SPI_READ), (16), (`IF_IDX(3)) );
spi_trans( (16'h0000), (`SPI_READ), (16), (`IF_IDX(4)) );
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$fdisplay(spidata_file, "--->>>设置顺序地址");
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//设置SM1在写入0xd地址触发enq
txBuf[0+3] = 8'h0d;
txBuf[1+3] = 8'h00;
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spi_trans( (16'h0202), (`SPI_WRITE), (2), (`IF_IDX(0)) );
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txBuf[0+3] = 8'h00;
txBuf[1+3] = 8'ha0;//heeader length 10
txBuf[2+3] = 8'h00;
txBuf[3+3] = 8'h00;
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//子报文
//设置顺序地址
txBuf[4+3] = 8'h0; //设备索引
txBuf[5+3] = 8'h0; //设备索引类型
txBuf[6+3] = $random; //地址
txBuf[7+3] = $random; //地址
txBuf[8+3] = 8'hd0; //命令d 负载长度2
txBuf[9+3] = 8'd02; //负载长度2
txBuf[10+3] = 8'h0; //工作计数0
txBuf[11+3] = 8'h0; //工作计数0
txBuf[12+3] = 8'h0; //负载
txBuf[13+3] = 8'h0; //负载
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spi_trans( (16'h1000), (`SPI_WRITE), (14), (`IF_IDX(0)) ); //写入SM1
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//发布请求
txBuf[0+3] = 8'h0e;
txBuf[1+3] = 8'h00;
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spi_trans( (16'h21), (`SPI_WRITE), (2), (`IF_IDX(0)) );//写入长度
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txBuf[0+3] = 8'h01;
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spi_trans( (16'h20), (`SPI_WRITE), (1), (`IF_IDX(0)) );//发送SM0 接收SM0, 请求发送
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@(posedge isResp) #5 begin end
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end
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//测试
spi_trans( (16'hc0), (`SPI_READ), (6), (3) );//发送SM0 接收SM0, 请求发送
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//读写
#50000
#50000
#50000
#50000
$fdisplay(spidata_file, "--->>>设置顺序地址后,检查顺序地址");
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//spi_trans( (16'h0010), (`SPI_READ), (5), (`IF_IDX(0)) );
spi_trans( (16'h0000), (`SPI_READ), (32), (`IF_IDX(1)) );
spi_trans( (16'h0000), (`SPI_READ), (32), (`IF_IDX(2)) );
spi_trans( (16'h0000), (`SPI_READ), (32), (`IF_IDX(3)) );
spi_trans( (16'h0000), (`SPI_READ), (32), (`IF_IDX(4)) );
$fdisplay(spidata_file, "\n\n测试用例5-交换数据");
$display("read&write @ %d", s_ShinTop_Mst.interface__io_cReg_timeStamp);
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begin
//设置SM1在写入516地址触发enq
txBuf[0+3] = 8'h03;
txBuf[1+3] = 8'h02;
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spi_trans( (16'h0202), (`SPI_WRITE), (2), (`IF_IDX(0)) );
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txBuf[0+3] = 8'h20;
txBuf[1+3] = 8'h00;//heeader length 512
txBuf[2+3] = 8'h00;
txBuf[3+3] = 8'h00;
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//子报文
txBuf[4+3] = 8'h0;
txBuf[5+3] = 8'h8; //index = 2
txBuf[6+3] = 8'h08; //地址 //SM0
txBuf[7+3] = 8'h30; //地址 //偏置
txBuf[8+3] = 8'h20; //命令2 长度56
txBuf[9+3] = 8'd56; //长度
txBuf[10+3] = $random;
txBuf[11+3] = $random;
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for( integer j = 0; j < 64-8; j = j + 1 ) begin
@(posedge clock) #3
txBuf[12+3+j] = $random;
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end
//-------------------------
//子报文
txBuf[68+3] = 8'h0;
txBuf[69+3] = 8'h4; //index = 1
txBuf[70+3] = 8'h08; //地址 //SM0
txBuf[71+3] = 8'h40; //地址 //偏置
txBuf[72+3] = 8'h10; //命令1 长度56
txBuf[73+3] = 8'd56; //长度
txBuf[74+3] = $random;
txBuf[75+3] = $random;
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for( integer j = 0; j < 64-8; j = j + 1 ) begin
@(posedge clock) #3
txBuf[76+3+j] = $random;
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end
//-------------------------
//子报文
txBuf[132+3] = 8'h0;
txBuf[133+3] = 8'hc; //index = 3
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txBuf[134+3] = 8'h10; //地址 //SM1
txBuf[135+3] = 8'h40; //地址 //偏置
txBuf[136+3] = 8'h00; //命令0 长度56
txBuf[137+3] = 8'd56; //长度
txBuf[138+3] = $random;
txBuf[139+3] = $random;
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for( integer j = 0; j < 64-8; j = j + 1 ) begin
@(posedge clock) #3
txBuf[140+3+j] = $random;
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end
//-------------------------
for( integer i = 0 ; i < 5; i = i + 1) begin
//子报文
txBuf[196+3+i*64+0] = $random;
txBuf[196+3+i*64+1] = 8'h0; //index = random
txBuf[196+3+i*64+2] = $random;
txBuf[196+3+i*64+3] = $random;
txBuf[196+3+i*64+4] = 8'h00; //命令0 长度56
txBuf[196+3+i*64+5] = 8'd56; //长度
txBuf[196+3+i*64+6] = $random;
txBuf[196+3+i*64+7] = $random;
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for( integer j = 0; j < 64-8; j = j + 1 ) begin
@(posedge clock) #3
txBuf[196+3+i*64+8+j] = $random;
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end
end
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spi_trans( (16'h1000), (`SPI_WRITE), (516), (`IF_IDX(0)) ); //写入SM1
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//发布请求
txBuf[0+3] = 8'h04;
txBuf[1+3] = 8'h02;
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spi_trans( (16'h21), (`SPI_WRITE), (2), (`IF_IDX(0)) );//写入长度
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txBuf[0+3] = 8'h01;
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spi_trans( (16'h20), (`SPI_WRITE), (1), (`IF_IDX(0)) );//发送SM0 接收SM0, 请求发送
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@(posedge isResp) #5 begin end
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end
// 同步
#90000
#90000
#90000
#90000
#90000
#90000
#90000
#90000
#90000
#90000
#90000
#90000
#90000
#90000
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$display("sync @ %d", s_ShinTop_Mst.interface__io_cReg_timeStamp);
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begin
//设置SM1在写入0x3地址触发enq
txBuf[0+3] = 8'h17;
txBuf[1+3] = 8'h00;
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spi_trans( (16'h0202), (`SPI_WRITE), (2), (`IF_IDX(0)) );
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txBuf[0+3] = 8'h01;
txBuf[1+3] = 8'h40;//heeader length 20
txBuf[2+3] = 8'h00;
txBuf[3+3] = 8'h00;
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//子报文
//设置同步
txBuf[4+3] = 8'h0; //设备索引
txBuf[5+3] = 8'h0; //设备索引类型
txBuf[6+3] = $random; //地址
txBuf[7+3] = $random; //地址
txBuf[8+3] = 8'he0; //命令d 负载长度2
txBuf[9+3] = 8'h0c; //负载长度c
txBuf[10+3] = 8'h0; //工作计数0
txBuf[11+3] = 8'h0; //工作计数0
txBuf[12+3] = 0;//timeStamp[7:0]; //负载
txBuf[13+3] = 0;//timeStamp[15:8]; //负载
txBuf[14+3] = 0;//timeStamp[23:16]; //负载
txBuf[15+3] = 0;//timeStamp[31:24]; //负载
txBuf[16+3] = 0;//timeStamp[39:32]; //负载
txBuf[17+3] = 0;//timeStamp[47:40]; //负载
txBuf[18+3] = 0;//timeStamp[55:48]; //负载
txBuf[19+3] = 0;//timeStamp[63:56]; //负载
txBuf[20+3] = 0;//s_ShinTop_Mst.masterParser.deltaTimeStamp[ 7: 0]; //负载
txBuf[21+3] = 0;//s_ShinTop_Mst.masterParser.deltaTimeStamp[15: 8]; //负载
txBuf[22+3] = 0;//s_ShinTop_Mst.masterParser.deltaTimeStamp[23:16]; //负载
txBuf[23+3] = 0;//s_ShinTop_Mst.masterParser.deltaTimeStamp[31:24]; //负载
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spi_trans( (16'h1000), (`SPI_WRITE), (24), (`IF_IDX(0)) ); //写入SM1
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//写入替换时间戳替换地址
txBuf[0+3] = 8'h0c;
txBuf[1+3] = 8'hc0;
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spi_trans( (16'h24), (`SPI_WRITE), (2), (`IF_IDX(0)) ); //写入替换时间戳替换地址寄存器
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//发布请求
txBuf[0+3] = 8'h18;
txBuf[1+3] = 8'h00;
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spi_trans( (16'h21), (`SPI_WRITE), (2), (`IF_IDX(0)) );//写入长度
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txBuf[0+3] = 8'h01;
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spi_trans( (16'h20), (`SPI_WRITE), (1), (`IF_IDX(0)) );//发送SM0 接收SM0, 请求发送
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@(posedge isResp) #5 begin end
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//清除替换时间戳替换地址
txBuf[0+3] = 8'h00;
txBuf[1+3] = 8'h00;
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spi_trans( (16'h25), (`SPI_WRITE), (2), (`IF_IDX(0)) ); //清除替换时间戳替换地址寄存器
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//设定sync信号
//设置SM1在写入51地址触发enq
txBuf[0+3] = 8'd51;
txBuf[1+3] = 8'h00;
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spi_trans( (16'h0202), (`SPI_WRITE), (2), (`IF_IDX(0)) );
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//header
txBuf[0+3] = 8'h03;
txBuf[1+3] = 8'h00;//heeader length 48
txBuf[2+3] = 8'h00;
txBuf[3+3] = 8'h00;
//子报文
//设置同步相关寄存器
txBuf[4+3] = 8'h0; //设备索引
txBuf[5+3] = 8'h08; //设备索引类型 //2号设备
txBuf[6+3] = 8'h01; //地址
txBuf[7+3] = 8'h20; //地址 0x120
txBuf[8+3] = 8'h10; //命令1 写入寄存器 负载长度2
txBuf[9+3] = 8'h28; //负载长度0x28
txBuf[10+3] = 8'h0; //工作计数0
txBuf[11+3] = 8'h0; //工作计数0
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// txBuf[12+3] = 8'h0f; //负载0x120 0x0f 全部脉冲全部使能
// txBuf[13+3] = 0; //负载0x121
// txBuf[14+3] = 10; //负载0x122 sync0脉冲宽度 10
// txBuf[15+3] = 0; //负载0x123
// txBuf[16+3] = 0; //负载0x124 sync1脉冲宽度 0
// txBuf[17+3] = 0; //负载0x125
// txBuf[18+3] = 1; //负载0x126 sync2脉冲宽度 1
// txBuf[19+3] = 0; //负载0x127
// txBuf[20+3] = 8'hff; //负载0x128 sync3脉冲宽度 最大
// txBuf[21+3] = 8'hff; //负载0x129
txBuf[12+3] = 8'hff; //负载0x120 0xff 全部电平全部使能
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txBuf[13+3] = 0; //负载0x121
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txBuf[14+3] = 0; //负载0x122 sync0脉冲宽度
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txBuf[15+3] = 0; //负载0x123
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txBuf[16+3] = 0; //负载0x124 sync1脉冲宽度
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txBuf[17+3] = 0; //负载0x125
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txBuf[18+3] = 0; //负载0x126 sync2脉冲宽度
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txBuf[19+3] = 0; //负载0x127
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txBuf[20+3] = 0; //负载0x128 sync3脉冲宽度
txBuf[21+3] = 0; //负载0x129
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txBuf[22+3] = 0; //负载0x12a empty
txBuf[23+3] = 0; //负载0x12b
txBuf[24+3] = 0; //负载0x12c
txBuf[25+3] = 0; //负载0x12d
txBuf[26+3] = 0; //负载0x12e
txBuf[27+3] = 0; //负载0x12f
//同步点
txBuf[28+3] = 8'h90; //负载0x130 同步点
txBuf[29+3] = 8'h88; //负载0x131
txBuf[30+3] = 0; //负载0x132
txBuf[31+3] = 0; //负载0x133
txBuf[32+3] = 0; //负载0x134
txBuf[33+3] = 0; //负载0x135
txBuf[34+3] = 0; //负载0x136
txBuf[35+3] = 0; //负载0x137
//周期
txBuf[36+3] = 8'hff; //负载0x138
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txBuf[37+3] = 8'hf; //负载0x139
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txBuf[38+3] = 0; //负载0x13a
txBuf[39+3] = 0; //负载0x13b
//0ffset sync1
txBuf[40+3] = 8'ha; //负载0x13c
txBuf[41+3] = 0; //负载0x13d
txBuf[42+3] = 0; //负载0x13e
txBuf[43+3] = 0; //负载0x13f
//0ffset sync2
txBuf[44+3] = 8'h0; //负载0x140
txBuf[45+3] = 0; //负载0x141
txBuf[46+3] = 0; //负载0x142
txBuf[47+3] = 0; //负载0x143
//0ffset sync3
txBuf[48+3] = 8'h0; //负载0x144
txBuf[49+3] = 8'h01; //负载0x145
txBuf[50+3] = 0; //负载0x146
txBuf[51+3] = 0; //负载0x147
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spi_trans( (16'h1000), (`SPI_WRITE), (52), (`IF_IDX(0)) ); //写入SM1
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//发布请求
txBuf[0+3] = 8'd52;
txBuf[1+3] = 8'h00;
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spi_trans( (16'h21), (`SPI_WRITE), (2), (`IF_IDX(0)) );//写入长度
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txBuf[0+3] = 8'h01;
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spi_trans( (16'h20), (`SPI_WRITE), (1), (`IF_IDX(0)) );//发送SM0 接收SM0, 请求发送
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@(posedge isResp) #5 begin end
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end
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//清脉冲
//设置SM1在写入19地址触发enq
txBuf[0+3] = 0; //负载0x122 sync0脉冲宽度
txBuf[1+3] = 0; //负载0x123
txBuf[2+3] = 0; //负载0x124 sync1脉冲宽度
txBuf[3+3] = 0; //负载0x125
txBuf[4+3] = 0; //负载0x126 sync2脉冲宽度
txBuf[5+3] = 0; //负载0x127
txBuf[6+3] = 0; //负载0x128 sync3脉冲宽度
txBuf[7+3] = 0; //负载0x129
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spi_trans( (16'h0122), (`SPI_WRITE), (8), (`IF_IDX(2)) ); //slv2
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end
endmodule