43 lines
677 B
ArmAsm
43 lines
677 B
ArmAsm
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#include "custom_ops.S"
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.extern main
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.globl _prog_start
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.section .text.init
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_prog_start:
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li sp, 0
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picorv32_maskirq_insn(zero, zero)
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call main
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ecall
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.balign 32
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.section .trap_entry, "ax", %progbits
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trap_entry:
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# q0 return address
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# q1 bitmask of all IRQ to be handled, may be more than one IRQ
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# q2 q3 unused, can be use as temp storage register
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# q寄存器已经禁用， Without the q-registers, the irq return address will be stored in x3 (gp) and the IRQ bitmask in x4 (tp),
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# io.interrupt(0) := intTxError
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# io.interrupt(1) := intRxError
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# io.interrupt(2) := intRxStart
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# io.interrupt(3) := intRxEnd
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or sp, sp, x4
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picorv32_retirq_insn()
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