Commit Graph

34 Commits

Author SHA1 Message Date
RuigeLee
bbabcb8549 使用测试IO上跳沿替代写有效的ctrlTransmit 写入,效果很好,可以认为,当前有问题的是寄存器写入 2024-03-21 19:08:34 +08:00
RuigeLee
b271a1c85f 用异步握手方式,提高了成功率,但还是有失败情形 2024-03-21 15:17:37 +08:00
RuigeLee
59103b6848 直接用IO信号判断,不用跳变沿,写更新需要改 2024-03-21 10:51:37 +08:00
RuigeLee
e53687e11d FSMC直达sram 2024-03-21 10:43:57 +08:00
RuigeLee
a5eba8edcf 待数据全部返回再交出transmit权限 2024-03-20 16:01:14 +08:00
RuigeLee
d64fa778ae 允许修改从机寄存器访问个数 2024-03-20 16:00:42 +08:00
RuigeLee
63ec7859a6 修复slvnum无法写入问题 2024-03-20 14:35:56 +08:00
RuigeLee
02d2ef66b7 没有接入从机情况下,主机初始化将在600us超时 2024-03-20 11:51:33 +08:00
RuigeLee
8b44141214 拆分初始化,同步流程,交给软件控制 2024-03-20 11:41:43 +08:00
RuigeLee
5f61a4265e 产生初始化完成,传输完成,错误中断信号,宽度一个周期(10MHZ) 2024-03-20 10:26:31 +08:00
RuigeLee
8d97fff560 修复访问FSMC寄存器空间时 锁错data的问题,跟cpu adv宽度有关 2024-03-19 19:39:32 +08:00
RuigeLee
0ae44e5c68 FSMC写优化后通过 2024-03-18 20:01:43 +08:00
RuigeLee
a29c01c812 改变读写操作方式,从单次跳变变为持续操作
增加4号测试寄存器,实际地址为4<<1
2024-03-16 20:46:35 +08:00
RuigeLee
2b18de45e6 没有片选时,AD必须为高阻态 2024-03-16 20:45:12 +08:00
RuigeLee
ca60205abc 反转FSMC信号电平,尝试测试 2024-03-06 17:41:28 +08:00
RuigeLee
dba35faa6e 主机模拟FSMC模式不能背靠背传送,否则会出CRC以及CDR 2024-02-22 16:34:01 +08:00
RuigeLee
d729dfbe7e FSMC跑测试 2024-01-09 17:48:23 +08:00
RuigeLee
d74a4754a7 FSMC重构,使用100MHZ过采样 2024-01-08 18:01:29 +08:00
RuigeLee
afd21f6913 临时调试修改,需要revert 2023-12-26 14:40:59 +08:00
RuigeLee
b098ca963e test pass 2023-09-14 19:16:17 +08:00
RuigeLee
6fd836fc9c new version 2023-09-12 17:51:32 +08:00
RuigeLee
05a905ac39 merge mirror read/write 2023-09-08 18:47:13 +08:00
RuigeLee
bf835014bc 16bit fsmc data; 16*2 reg, 100us 2023-09-08 16:37:31 +08:00
RuigeLee
145db92202 test pass 2023-08-31 17:39:12 +08:00
RuigeLee
d226487a5e BUG FIX 2023-08-31 15:10:18 +08:00
RuigeLee
860e24ca99 check mst 2023-08-30 17:32:19 +08:00
RuigeLee
c0645cfe16 update sram; bug fixed; lvds failed 2023-08-23 19:32:41 +08:00
RuigeLee
589fc528a0 compile pass 2023-08-20 15:50:11 +08:00
Ruige Lee
f3a44f0b31 slv 2023-08-18 12:10:47 +00:00
RuigeLee
6fa2ef5f6e porta 2023-08-16 22:25:30 +08:00
Ruige Lee
bbd0f0b887 sync 2023-08-16 06:12:49 +00:00
Ruige Lee
6c2f0b02f8 FSMC 2023-08-15 08:42:56 +00:00
RuigeLee
a041c7732a over sample in spi 2023-08-07 10:15:56 +08:00
RuigeLee
24800cce9d spi compile pass 2023-07-31 22:56:09 +08:00