RuigeLee
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98b13e6b94
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stage
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2023-12-27 17:44:42 +08:00 |
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RuigeLee
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6fd836fc9c
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new version
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2023-09-12 17:51:32 +08:00 |
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RuigeLee
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bf835014bc
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16bit fsmc data; 16*2 reg, 100us
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2023-09-08 16:37:31 +08:00 |
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RuigeLee
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145db92202
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test pass
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2023-08-31 17:39:12 +08:00 |
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RuigeLee
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589fc528a0
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compile pass
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2023-08-20 15:50:11 +08:00 |
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RuigeLee
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1c7a226a70
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add function demo
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2023-08-09 14:43:24 +08:00 |
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RuigeLee
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5d43600680
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fpga sync
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2023-08-01 15:50:53 +08:00 |
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Ruige
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85fe9175e6
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backplaneslv compile pass
Signed-off-by: Ruige <295054118@whut.edu.cn>
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2023-07-25 21:05:43 +08:00 |
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RuigeLee
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b1fd2db2e0
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backboard
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2023-07-24 19:31:32 +08:00 |
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