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587ce41798
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完善测试用例
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2025-08-19 17:38:39 +08:00 |
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Ruige Lee
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946bbd8c35
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主站增加19号中断用于提示上行CRC错误
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2025-08-19 16:03:12 +08:00 |
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Ruige Lee
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827bbb2852
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修复主站CRC校验逻辑（欠一拍）；增加22号寄存器，提示主站接收CRC错误
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2025-08-19 15:19:21 +08:00 |
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00dd4fee46
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增加一个测试用例tc5,主站错误,并未报错.需要调试一下
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2025-08-19 13:23:44 +08:00 |
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Ruige Lee
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f3916df37b
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弃用高频率采样CDR的例化
Merge branch 'mp_eb_dev_多采样全表决' into mp_eb_dev
* mp_eb_dev_多采样全表决:
调整解锁条件为10个连续0
增加一个锁定可以暂时解决发送失败问题
滤波 表决 鉴相同时存在
enhance 要求先跨时钟，再进行后续表决
Revert "16相位改8相位"
16相位改8相位
bug: 16相位补充相 欠了一相
Revert "改6相位，从一个pll出，测试"
Revert "尝试3相位"
尝试3相位
改6相位，从一个pll出，测试
拉出测试IO
Revert "4多相位效果明显更好"
4多相位效果明显更好
16相位操作还是卡
# Conflicts:
# src/main/scala/backBoard/ebus/CDRIn.scala
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2025-08-19 10:00:25 +08:00 |
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bd336313c6
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增加测试串行线路采样数据的代码, 可以回答晶体容限\漂移\滤波器效果等问题
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2025-08-19 09:10:43 +08:00 |
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Ruige Lee
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2fb450673f
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调整解锁条件为10个连续0
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2025-08-18 17:39:32 +08:00 |
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Ruige Lee
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2afd3f722a
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增加一个锁定可以暂时解决发送失败问题
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2025-08-18 16:20:50 +08:00 |
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4bdd1fd0ef
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进一步参数化代码
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2025-08-16 18:52:02 +08:00 |
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0978a5d72b
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进一步参数化代码
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2025-08-16 18:46:19 +08:00 |
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be792e000a
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将代码参数化,便于代码自动化生成
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2025-08-16 18:38:50 +08:00 |
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Ruige Lee
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11bbf14226
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滤波 表决 鉴相同时存在
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2025-08-15 17:18:45 +08:00 |
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Ruige Lee
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45d2d223c1
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enhance 要求先跨时钟，再进行后续表决
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2025-08-15 15:28:28 +08:00 |
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Ruige Lee
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62684bd665
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Revert "16相位改8相位"
This reverts commit 2da45138db.
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2025-08-15 10:45:44 +08:00 |
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Ruige Lee
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2da45138db
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16相位改8相位
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2025-08-15 10:45:10 +08:00 |
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Ruige Lee
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fc917054ed
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bug: 16相位补充相 欠了一相
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2025-08-14 19:23:56 +08:00 |
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Ruige Lee
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573a1ad45f
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bug:滤波需要顺序打拍，防止边界上跳变
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2025-08-14 19:15:09 +08:00 |
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Ruige Lee
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035109bee1
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Revert "改6相位，从一个pll出，测试"
This reverts commit 495a238a26.
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2025-08-13 17:54:50 +08:00 |
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Ruige Lee
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4955b7a278
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Revert "尝试3相位"
This reverts commit c6aa7416fc.
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2025-08-13 17:54:39 +08:00 |
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46f0ba9e19
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增加新的测试用例,测试通过
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2025-08-13 16:10:58 +08:00 |
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26e4426565
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根据讨论,主站由于不能屏蔽嗅探包带来的线路影响;考虑在嗅探包之后补一个广播包;然后再进行同步.同时,在有多个子包的情况下,同步包应放到最开始.
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2025-08-13 15:46:45 +08:00 |
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Ruige Lee
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6c2f2fa93b
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主站必须发送大于8byte的包才会更新同步寄存器
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2025-08-13 15:39:00 +08:00 |
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Ruige Lee
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3bb9b73a60
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Merge branch 'mp_eb_dev' of github.com:whutddk/RISCV-MAC-SWICH into mp_eb_dev
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2025-08-13 14:23:50 +08:00 |
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361170cc64
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增加新测试用例
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2025-08-13 13:34:34 +08:00 |
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Ruige Lee
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b97ce75c39
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Revert "从站只在同步包时更新自身时间信息"
This reverts commit 3f41920805.
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2025-08-13 11:40:19 +08:00 |
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Ruige Lee
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3f41920805
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从站只在同步包时更新自身时间信息
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2025-08-13 11:08:56 +08:00 |
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Ruige Lee
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c6aa7416fc
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尝试3相位
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2025-08-13 10:52:49 +08:00 |
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Ruige Lee
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495a238a26
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改6相位，从一个pll出，测试
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2025-08-13 10:00:11 +08:00 |
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f460b4c6c7
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上传同步测试代码
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2025-08-13 09:49:58 +08:00 |
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f20604892a
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增加sync下的测试用例
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2025-08-13 09:23:38 +08:00 |
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12a142bf2e
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修改了默认的接口，部分测试用例以及接口代码，需要修改。
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2025-08-13 00:30:21 +08:00 |
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89937759cf
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增加QSPI状况下的配置代码
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2025-08-12 18:32:28 +08:00 |
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6eb5cf8e48
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修改顶层测试用例的启用
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2025-08-12 18:21:22 +08:00 |
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Ruige Lee
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2a7faafcff
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修复位宽推断错误
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2025-08-12 18:09:40 +08:00 |
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Ruige Lee
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d045705950
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spi初始值改为1
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2025-08-12 17:54:24 +08:00 |
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Ruige Lee
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cb2c4f46e5
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拉出测试IO
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2025-08-12 17:48:35 +08:00 |
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89071e4973
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修改测试用例
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2025-08-12 17:26:20 +08:00 |
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96ed1d8d95
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测试统计寄存器
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2025-08-12 11:45:38 +08:00 |
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Ruige Lee
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107895f6e0
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Revert "4多相位效果明显更好"
This reverts commit 7338314c17.
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2025-08-12 09:55:43 +08:00 |
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Ruige Lee
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7338314c17
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4多相位效果明显更好
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2025-08-11 19:33:56 +08:00 |
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0879cf0e93
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修改测试用例的标准数据
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2025-08-11 18:23:45 +08:00 |
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Ruige Lee
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b0b221e8b0
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16相位操作还是卡
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2025-08-11 18:13:58 +08:00 |
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5448cfd23f
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增加顶层的FPGA上的sync输出,修改测试用例
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2025-08-11 18:04:46 +08:00 |
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Ruige Lee
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24cbc2723c
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接死仿真顶层的输入，防止亚稳态
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2025-08-11 17:04:39 +08:00 |
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Ruige Lee
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b590ad79bc
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增加spi模式选择到顶层
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2025-08-11 16:55:43 +08:00 |
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Ruige Lee
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86fc61e0a4
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增加两组寄存器
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2025-08-11 16:54:18 +08:00 |
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Ruige Lee
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eefa793c11
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Merge remote-tracking branch 'origin/eb_dev' into mp_eb_dev
# Conflicts:
# tb/shinTest/ShinTopSpiTb.v
# tb/shinTest/testcase_result/base_tc06_result.log
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2025-08-11 16:13:26 +08:00 |
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Ruige Lee
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1cb0cee966
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should >= 3
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2025-08-11 10:07:54 +08:00 |
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Ruige Lee
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a31b08dcda
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Merge branch 'mp_eb_dev' of github.com:whutddk/RISCV-MAC-SWICH into mp_eb_dev
# Conflicts:
# src/main/scala/backBoard/ebus/CDROut.scala
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2025-08-11 10:07:18 +08:00 |
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Ruige Lee
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cae503f4c2
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preamble应该大于3
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2025-08-11 10:05:49 +08:00 |
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