暂时屏蔽了fsmc两个诊断宏，便于调试；增加汇编代码，已经看到Tx0作为下行输出的波形了

src/main/scala/backBoard/ebus/FSMC2TileLink.scala

@@ -164,8 +164,8 @@ class FSMC2TileLink(implicit p: Parameters) extends LazyModule{
     // val tld = Wire(new DecoupledIO(new TLBundleD(fsmc_edge.bundle)))
 
     val sram  = Module(new MirrorSRAMDP())
-    assert( ~(sram.io.enwA & sram.io.enrA) )
-    assert( ~(sram.io.enwB & sram.io.enrB) )
+    //assert( ~(sram.io.enwA & sram.io.enrA) )
+    //assert( ~(sram.io.enwB & sram.io.enrB) )
     sram.io.clockA := clock.asBool //system
     sram.io.clockB := clock.asBool //system