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增加代码，修正代码中的定义错误；测试cdr的CRC相关部分，尚未测试完全；代码正常运行

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This commit is contained in:
bacon
2025-02-03 23:49:50 +08:00
parent 6b6258ffa9
commit e9f0653de5
4 changed files with 44 additions and 39 deletions
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30
tb/sw/tl2cdr/tl2cdr.c
View File

@@ -5,18 +5,21 @@
#error TL2CDR Base address not define!!!
#endif
volatile uint32_t *cdr_status = (uint32_t*)( TL2CDR_BASE + CDR_ReadStatus ); //read
volatile uint32_t *cdr_txLen = (uint32_t*)( TL2CDR_BASE + CDR_WriteTxLen ); //write
volatile uint32_t *cdr_txFifo = (uint32_t*)( TL2CDR_BASE + CDR_WriteTxFifo ); //write
volatile uint32_t *cdr_direct = (uint32_t*)( TL2CDR_BASE + CDR_WriteTransDir ); //write
volatile uint32_t * const cdr_status = (uint32_t*)( TL2CDR_BASE + CDR_ReadStatus ); //read
volatile uint32_t * const cdr_txLen = (uint32_t*)( TL2CDR_BASE + CDR_WriteTxLen ); //write
volatile uint32_t * const cdr_txFifo = (uint32_t*)( TL2CDR_BASE + CDR_WriteTxFifo ); //write
volatile uint32_t * const cdr_direct = (uint32_t*)( TL2CDR_BASE + CDR_WriteTransDir ); //write
volatile uint32_t *cdr_softReset = (uint32_t*)( TL2CDR_BASE + CDR_WriteSoftReset ); //write
volatile uint32_t *cdr_rxLen = (uint32_t*)( TL2CDR_BASE + CDR_ReadRxLen ); //read
volatile uint32_t *cdr_rxFifo = (uint32_t*)( TL2CDR_BASE + CDR_ReadRxFifo ); //read
volatile uint32_t * const cdr_softReset = (uint32_t*)( TL2CDR_BASE + CDR_WriteSoftReset ); //write
volatile uint32_t * const cdr_rxLen = (uint32_t*)( TL2CDR_BASE + CDR_ReadRxLen ); //read
volatile uint32_t * const cdr_rxFifo = (uint32_t*)( TL2CDR_BASE + CDR_ReadRxFifo ); //read
volatile uint32_t *cdr_IsLast = (uint32_t*)( TL2CDR_BASE + CDR_ReadIsLast ); //read
volatile uint32_t * const cdr_IsLast = (uint32_t*)( TL2CDR_BASE + CDR_ReadIsLast ); //read
volatile uint32_t * const cdr_rxCrc = (uint32_t*)( TL2CDR_BASE + CDR_ReadRxCrc );
volatile uint32_t * const cdr_txCrc = (uint32_t*)( TL2CDR_BASE + CDR_ReadTxCrc);
#if 0
void cdr_set_downStream(){
*cdr_softReset = 1; //复位脉冲
*cdr_direct = 0;
@@ -102,14 +105,5 @@ void cdr_slave_function(){
}
#endif

18
tb/sw/tl2cdr/tl2cdr.h
View File

@@ -35,14 +35,16 @@
#define CDR_INT_RXEND 17
#ifndef __ASSEMBLER__
extern volatile uint32_t *cdr_status = (uint32_t*)( TL2CDR_BASE + CDR_ReadStatus ); //read
extern volatile uint32_t *cdr_txLen = (uint32_t*)( TL2CDR_BASE + CDR_WriteTxLen ); //write
extern volatile uint32_t *cdr_txFifo = (uint32_t*)( TL2CDR_BASE + CDR_WriteTxFifo ); //write
extern volatile uint32_t *cdr_direct = (uint32_t*)( TL2CDR_BASE + CDR_WriteTransDir ); //write
extern volatile uint32_t *cdr_softReset = (uint32_t*)( TL2CDR_BASE + CDR_WriteSoftReset ); //write
extern volatile uint32_t *cdr_rxLen = (uint32_t*)( TL2CDR_BASE + CDR_ReadRxLen ); //read
extern volatile uint32_t *cdr_rxFifo = (uint32_t*)( TL2CDR_BASE + CDR_ReadRxFifo ); //read
extern volatile uint32_t *cdr_IsLast = (uint32_t*)( TL2CDR_BASE + CDR_ReadIsLast ); //read
extern volatile uint32_t * const cdr_status;// = (uint32_t*)( TL2CDR_BASE + CDR_ReadStatus ); //read
extern volatile uint32_t * const cdr_txLen;// = (uint32_t*)( TL2CDR_BASE + CDR_WriteTxLen ); //write
extern volatile uint32_t * const cdr_txFifo;// = (uint32_t*)( TL2CDR_BASE + CDR_WriteTxFifo ); //write
extern volatile uint32_t * const cdr_direct;// = (uint32_t*)( TL2CDR_BASE + CDR_WriteTransDir ); //write
extern volatile uint32_t * const cdr_softReset;// = (uint32_t*)( TL2CDR_BASE + CDR_WriteSoftReset ); //write
extern volatile uint32_t * const cdr_rxLen;// = (uint32_t*)( TL2CDR_BASE + CDR_ReadRxLen ); //read
extern volatile uint32_t * const cdr_rxFifo;// = (uint32_t*)( TL2CDR_BASE + CDR_ReadRxFifo ); //read
extern volatile uint32_t * const cdr_IsLast;// = (uint32_t*)( TL2CDR_BASE + CDR_ReadIsLast ); //read
extern volatile uint32_t * const cdr_rxCrc;// = (uint32_t*)( TL2CDR_BASE + CDR_ReadRxCrc );
extern volatile uint32_t * const cdr_txCrc;// = (uint32_t*)( TL2CDR_BASE + CDR_ReadTxCrc);
// extern uint8_t gpio_read();
// extern uint32_t gpio_write( uint32_t data );