diff --git a/Makefile b/Makefile
index 9ac6b8e..6c44975 100644
--- a/Makefile
+++ b/Makefile
@@ -62,13 +62,15 @@ VSimTop:
 	# +define+RANDOMIZE_MEM_INIT
 
 test:
+	@echo "Start simulation..."
 	-./tb/build/VSimTop -w -l -f ./tb/sw/build/mstTest >./tb/sw/build/log.txt 2>&1
+	@echo "done! Use the 'make fst' to view the simulation results."
 	@echo "Processing simulation log..."
 	@cat ./tb/sw/build/log.txt | grep '^\[\ \ 0\]' 1>./tb/sw/build/cpu0_log.txt
 	@cat ./tb/sw/build/log.txt | grep '^\[\ \ 1\]' 1>./tb/sw/build/cpu1_log.txt
 	@cat ./tb/sw/build/log.txt | grep '^\[\ \ 2\]' 1>./tb/sw/build/cpu2_log.txt
 	@cat ./tb/sw/build/log.txt | grep '^\[\ \ 3\]' 1>./tb/sw/build/cpu3_log.txt
-	@echo "done!"
+	@echo "done! Please check ./tb/sw/build/*log.txt"
 
 sw:
 	rm ./tb/sw/build/* -f
@@ -103,22 +105,24 @@ sw:
 	-c ./tb/sw/src/mstStartup.S \
 	-o ./tb/sw/build/mstStartup.o
 
+	$(RVCC) -ggdb $(RV32E_MARCH) $(RV32E_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs \
+	-I ./tb/sw/ -I ./tb/sw/src \
+	-I ./tb/sw/tl2cdr \
+	-c ./tb/sw/tl2cdr/tl2cdr.c \
+	-o ./tb/sw/build/tl2cdr.o
+
 	$(RVCC) -ggdb $(RV32E_MARCH) $(RV32E_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs \
 	-I ./tb/sw/ -I ./tb/sw/src \
 	-I ./tb/sw/tl2cdr \
 	-c ./tb/sw/src/MstMain.c \
 	-o ./tb/sw/build/mstMain.o
 
-	# $(RVCC) -ggdb $(RV32E_MARCH) $(RV32E_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -mcmodel=medany -mexplicit-relocs \
-	# -I ./tb/sw/ -I ./tb/sw/src \
-	# -c ./tb/sw/src/mstMain.S \
-	# -o ./tb/sw/build/mstMain.o
-
 	$(RVCC) -ggdb $(RV32E_MARCH) $(RV32E_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -nostdlib -nodefaultlibs -nostartfiles \
 	-T ./tb/sw/linker.lds \
 	./tb/sw/build/mstStartup.o \
 	./tb/sw/build/mstMain.o \
 	./tb/sw/build/mstSvr.o \
+	./tb/sw/build/tl2cdr.o \
 	-o ./tb/sw/build/mstTest.elf
 
 	$(TARGET)-objcopy -O binary ./tb/sw/build/mstTest.elf  ./tb/sw/build/mstTest.bin
@@ -151,6 +155,12 @@ sw:
 	-c ./tb/sw/build/slvSvr.c \
 	-o ./tb/sw/build/slvSvr.o
 
+	$(RVCC) -ggdb $(RV32E_MARCH) $(RV32E_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs \
+	-I ./tb/sw/ -I ./tb/sw/src \
+	-I ./tb/sw/tl2cdr \
+	-c ./tb/sw/tl2cdr/tl2cdr.c \
+	-o ./tb/sw/build/tl2cdr.o
+
 	$(RVCC) -ggdb $(RV32E_MARCH) $(RV32E_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs \
 	-I ./tb/sw/ -I ./tb/sw/src \
 	-I ./tb/sw/tl2cdr \
@@ -163,16 +173,12 @@ sw:
 	-c ./tb/sw/src/slvStartup.S \
 	-o ./tb/sw/build/slvStartup.o
 
-	# $(RVCC) -ggdb $(RV32E_MARCH) $(RV32E_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -mcmodel=medany -mexplicit-relocs \
-	# -I ./tb/sw/ -I ./tb/sw/src \
-	# -c ./tb/sw/src/slvMain.S \
-	# -o ./tb/sw/build/slvMain.o
-
 	$(RVCC) -ggdb $(RV32E_MARCH) $(RV32E_CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -nostdlib -nodefaultlibs -nostartfiles \
 	-T ./tb/sw/linker.lds \
 	./tb/sw/build/slvSvr.o \
 	./tb/sw/build/slvStartup.o \
 	./tb/sw/build/slvMain.o \
+	./tb/sw/build/tl2cdr.o \
 	-o ./tb/sw/build/slvTest.elf
 
 	$(TARGET)-objcopy -O binary ./tb/sw/build/slvTest.elf  ./tb/sw/build/slvTest.bin
diff --git a/tb/sw/src/MstMain.c b/tb/sw/src/MstMain.c
index a847fcd..e741636 100644
--- a/tb/sw/src/MstMain.c
+++ b/tb/sw/src/MstMain.c
@@ -85,6 +85,7 @@ void main()
 	uint32_t isLast;
 
 	uint32_t led = 0;
+	uint32_t crc;
 
 	//init_svr_code = (uint32_t (*)(void))mst_svr_code;
 
@@ -137,9 +138,11 @@ void main()
 		*cdr_txFifo = (512 << 20) |( 0 << 16) | 0x0000; //负载长度512，操作数0， 参数全0
 		*cdr_txFifo = 0x00000000;
 
-		for( uint32_t i = 0; i < 512/4; i ++ ){
+		for( uint32_t i = 0; i < 512/4 - 1; i ++ ){
 			*cdr_txFifo = 0x00000000;
 		}
+		crc = *cdr_txCrc;
+		*cdr_txFifo = crc;
 
 		//等待发送完成标志
 								// asm volatile (
@@ -218,7 +221,7 @@ void main()
 												// 	"bnez %0, 1b\n" //error
 												// 	:"+r"(flag)
 												// );
-		uint32_t crc = *cdr_rxFifo; //CRC
+		//uint32_t crc = *cdr_rxFifo; //CRC
 
 		//等待接收完成标志
 												// asm volatile (
diff --git a/tb/sw/tl2cdr/tl2cdr.c b/tb/sw/tl2cdr/tl2cdr.c
index f970087..d7cccb1 100644
--- a/tb/sw/tl2cdr/tl2cdr.c
+++ b/tb/sw/tl2cdr/tl2cdr.c
@@ -5,18 +5,21 @@
 #error TL2CDR Base address not define!!!
 #endif
 
-volatile uint32_t *cdr_status = (uint32_t*)( TL2CDR_BASE + CDR_ReadStatus ); //read
-volatile uint32_t *cdr_txLen  = (uint32_t*)( TL2CDR_BASE + CDR_WriteTxLen ); //write
-volatile uint32_t *cdr_txFifo = (uint32_t*)( TL2CDR_BASE + CDR_WriteTxFifo ); //write
-volatile uint32_t *cdr_direct = (uint32_t*)( TL2CDR_BASE + CDR_WriteTransDir ); //write
+volatile uint32_t * const cdr_status = (uint32_t*)( TL2CDR_BASE + CDR_ReadStatus ); //read
+volatile uint32_t * const cdr_txLen  = (uint32_t*)( TL2CDR_BASE + CDR_WriteTxLen ); //write
+volatile uint32_t * const cdr_txFifo = (uint32_t*)( TL2CDR_BASE + CDR_WriteTxFifo ); //write
+volatile uint32_t * const cdr_direct = (uint32_t*)( TL2CDR_BASE + CDR_WriteTransDir ); //write
 
-volatile uint32_t *cdr_softReset = (uint32_t*)( TL2CDR_BASE + CDR_WriteSoftReset ); //write
-volatile uint32_t *cdr_rxLen     = (uint32_t*)( TL2CDR_BASE + CDR_ReadRxLen ); //read
-volatile uint32_t *cdr_rxFifo    = (uint32_t*)( TL2CDR_BASE + CDR_ReadRxFifo ); //read
+volatile uint32_t * const cdr_softReset = (uint32_t*)( TL2CDR_BASE + CDR_WriteSoftReset ); //write
+volatile uint32_t * const cdr_rxLen     = (uint32_t*)( TL2CDR_BASE + CDR_ReadRxLen ); //read
+volatile uint32_t * const cdr_rxFifo    = (uint32_t*)( TL2CDR_BASE + CDR_ReadRxFifo ); //read
 
-volatile uint32_t *cdr_IsLast    = (uint32_t*)( TL2CDR_BASE + CDR_ReadIsLast ); //read
+volatile uint32_t * const cdr_IsLast    = (uint32_t*)( TL2CDR_BASE + CDR_ReadIsLast ); //read
+volatile uint32_t * const cdr_rxCrc     = (uint32_t*)( TL2CDR_BASE + CDR_ReadRxCrc );
+volatile uint32_t * const cdr_txCrc     = (uint32_t*)( TL2CDR_BASE + CDR_ReadTxCrc);
 
 
+#if 0
 void cdr_set_downStream(){
 	*cdr_softReset = 1; //复位脉冲
 	*cdr_direct = 0;
@@ -102,14 +105,5 @@ void cdr_slave_function(){
 	
 }
 
-
-
-
-
-
-
-
-
-
-
+#endif
 
diff --git a/tb/sw/tl2cdr/tl2cdr.h b/tb/sw/tl2cdr/tl2cdr.h
index 5f1af6c..18d730c 100644
--- a/tb/sw/tl2cdr/tl2cdr.h
+++ b/tb/sw/tl2cdr/tl2cdr.h
@@ -35,14 +35,16 @@
 #define CDR_INT_RXEND   17
 
 #ifndef __ASSEMBLER__
-extern volatile uint32_t *cdr_status = (uint32_t*)( TL2CDR_BASE + CDR_ReadStatus ); //read
-extern volatile uint32_t *cdr_txLen  = (uint32_t*)( TL2CDR_BASE + CDR_WriteTxLen ); //write
-extern volatile uint32_t *cdr_txFifo = (uint32_t*)( TL2CDR_BASE + CDR_WriteTxFifo ); //write
-extern volatile uint32_t *cdr_direct = (uint32_t*)( TL2CDR_BASE + CDR_WriteTransDir ); //write
-extern volatile uint32_t *cdr_softReset = (uint32_t*)( TL2CDR_BASE + CDR_WriteSoftReset ); //write
-extern volatile uint32_t *cdr_rxLen     = (uint32_t*)( TL2CDR_BASE + CDR_ReadRxLen ); //read
-extern volatile uint32_t *cdr_rxFifo    = (uint32_t*)( TL2CDR_BASE + CDR_ReadRxFifo ); //read
-extern volatile uint32_t *cdr_IsLast    = (uint32_t*)( TL2CDR_BASE + CDR_ReadIsLast ); //read
+extern volatile uint32_t * const cdr_status;// = (uint32_t*)( TL2CDR_BASE + CDR_ReadStatus ); //read
+extern volatile uint32_t * const cdr_txLen;//  = (uint32_t*)( TL2CDR_BASE + CDR_WriteTxLen ); //write
+extern volatile uint32_t * const cdr_txFifo;// = (uint32_t*)( TL2CDR_BASE + CDR_WriteTxFifo ); //write
+extern volatile uint32_t * const cdr_direct;// = (uint32_t*)( TL2CDR_BASE + CDR_WriteTransDir ); //write
+extern volatile uint32_t * const cdr_softReset;// = (uint32_t*)( TL2CDR_BASE + CDR_WriteSoftReset ); //write
+extern volatile uint32_t * const cdr_rxLen;//     = (uint32_t*)( TL2CDR_BASE + CDR_ReadRxLen ); //read
+extern volatile uint32_t * const cdr_rxFifo;//    = (uint32_t*)( TL2CDR_BASE + CDR_ReadRxFifo ); //read
+extern volatile uint32_t * const cdr_IsLast;//    = (uint32_t*)( TL2CDR_BASE + CDR_ReadIsLast ); //read
+extern volatile uint32_t * const cdr_rxCrc;//     = (uint32_t*)( TL2CDR_BASE + CDR_ReadRxCrc );
+extern volatile uint32_t * const cdr_txCrc;//     = (uint32_t*)( TL2CDR_BASE + CDR_ReadTxCrc);
 // extern uint8_t gpio_read();
 // extern uint32_t gpio_write( uint32_t data );