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cdrout 每128byte发送无意义“b0000000010”用于解锁cdrin并重新上锁

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需要配平fifo，覆盖每个长度端，长度边缘，解锁在crc位置，不同preamble长度
This commit is contained in:
Ruige Lee
2025-08-19 17:04:26 +08:00
parent 946bbd8c35
commit d7146a786b
2 changed files with 15 additions and 9 deletions
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12
src/main/scala/backBoard/ebus/CDRIn.scala
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@@ -110,12 +110,12 @@ trait CDRInMultiSample{ this: CDRInBase =>
(sampleReg_sync(i+0) & sampleReg_sync(i+1))
}
val clearCnt = Reg(UInt(4.W))
val clearCnt = Reg(UInt(3.W))
val arbLock = Reg(UInt( clkNum.W ))
val isLock = RegInit(false.B)
when( sampleReg.reduce(_|_) === false.B ){
when( clearCnt =/= 10.U ){
when( clearCnt =/= 6.U ){
clearCnt := clearCnt + 1.U
}
} .otherwise{
@@ -132,7 +132,7 @@ trait CDRInMultiSample{ this: CDRInBase =>
isLock := true.B
}
}
} .elsewhen( clearCnt === 10.U ){
} .elsewhen( clearCnt === 6.U ){
isLock := false.B
}
@@ -171,6 +171,7 @@ trait CDRInAxis{ this: CDRInBase =>
val checkSFD = RegInit( 0.U(20.W) ); checkSFD := Cat( checkSFD(18,0), syncSerDat )
val shiftData = Dualb4b5Decoder(checkSFD(9,0))
val isReleaseLock = checkSFD(9,0) === "b0000000010".U
val payloadLen = RegInit(0.U(12.W))
when( byteCnt === 0.U & bitCnt === 9.U & stateCurr === STATE_HEADER ){
@@ -206,8 +207,9 @@ trait CDRInAxis{ this: CDRInBase =>
when( stateCurr === STATE_HEADER ){
byteCnt := Mux( byteCnt =/= (HeaderByte-1).U, byteCnt + 1.U, 0.U )
assert( byteCnt <= (HeaderByte-1).U )
assert(~isReleaseLock)
} .elsewhen( stateCurr === STATE_PAYLOAD ){
byteCnt := Mux( byteCnt =/= (payloadLen+ (4-1).U), byteCnt + 1.U, 0.U )
byteCnt := Mux( byteCnt =/= (payloadLen+ (4-1).U), Mux( isReleaseLock, byteCnt, byteCnt + 1.U ), 0.U )
assert( byteCnt <= ( payloadLen+ (4-1).U ) )
}
}
@@ -229,7 +231,7 @@ trait CDRInAxis{ this: CDRInBase =>
when( io.axis.fire ){
axis_valid := false.B
} .elsewhen( bitCnt === 9.U & ( stateCurr === STATE_HEADER | stateCurr === STATE_PAYLOAD ) ){
} .elsewhen( bitCnt === 9.U & ( stateCurr === STATE_HEADER | (stateCurr === STATE_PAYLOAD & ~isReleaseLock) ) ){
axis_valid := true.B
}