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看门狗目标寄存器初始值改为0xffffffff，看门狗计数器逻辑修改

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Ruige Lee
2025-08-22 15:38:51 +08:00
parent eb4c46a310
commit d2899df8b4
2 changed files with 10 additions and 9 deletions
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10
src/main/scala/backBoard/shin/Interface.scala
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@@ -1060,10 +1060,10 @@ trait InterfaceWdt{ this: InterfaceBase =>
for( i <- 0 until 18 ){
cReg.wdtTarCnt(i) :=
Cat(
RegEnable( dataw, 0.U(8.W), isEnW & addrw === ( "h40b".U (16.W) + (4*i).U ) ),
RegEnable( dataw, 0.U(8.W), isEnW & addrw === ( "h40a".U (16.W) + (4*i).U ) ),
RegEnable( dataw, 0.U(8.W), isEnW & addrw === ( "h409".U (16.W) + (4*i).U ) ),
RegEnable( dataw, 0.U(8.W), isEnW & addrw === ( "h408".U (16.W) + (4*i).U ) ),
RegEnable( dataw, "hFF".U(8.W), isEnW & addrw === ( "h40b".U (16.W) + (4*i).U ) ),
RegEnable( dataw, "hFF".U(8.W), isEnW & addrw === ( "h40a".U (16.W) + (4*i).U ) ),
RegEnable( dataw, "hFF".U(8.W), isEnW & addrw === ( "h409".U (16.W) + (4*i).U ) ),
RegEnable( dataw, "hFF".U(8.W), isEnW & addrw === ( "h408".U (16.W) + (4*i).U ) ),
)
}
}
@@ -1201,7 +1201,7 @@ trait InterfaceSystem{ this: InterfaceBase =>
(io.intMstTrig(1) & cReg.intEnable(1)) | //主站接收完成
(isLocalSyncInt & cReg.intEnable(2)) | //主站发送周期到了
(isLatchEvent & cReg.intEnable(3)) | //latch Event
(~RegNext(isWdtTrigAndEnable, false.B) & isWdtTrigAndEnable & cReg.intEnable(4)) | //主站接收看门狗溢出
(isWdtTrigAndEnable & cReg.intEnable(4)) | //主站接收看门狗溢出
(0 until 8).map{ i => io.intSlvTrig(i) & cReg.intEnable(8+i)}.reduce(_|_) | //从站SM请求
(0 until 4).map{ i => io.intTransEnd(i) & cReg.intEnable(16+i)}.reduce(_|_) | //传输完成请求 16,17,18,19
isMstRecCRCErr | //override //主站状态下19为上行crc接收错误 //不会同时发生