diff --git a/src/main/scala/backBoard/shin/Interface.scala b/src/main/scala/backBoard/shin/Interface.scala
index b921a9a..2b46c29 100644
--- a/src/main/scala/backBoard/shin/Interface.scala
+++ b/src/main/scala/backBoard/shin/Interface.scala
@@ -1060,10 +1060,10 @@ trait InterfaceWdt{ this: InterfaceBase =>
   for( i <- 0 until 18 ){
     cReg.wdtTarCnt(i) :=
       Cat(
-        RegEnable( dataw, 0.U(8.W), isEnW & addrw === ( "h40b".U (16.W) + (4*i).U ) ),
-        RegEnable( dataw, 0.U(8.W), isEnW & addrw === ( "h40a".U (16.W) + (4*i).U ) ),
-        RegEnable( dataw, 0.U(8.W), isEnW & addrw === ( "h409".U (16.W) + (4*i).U ) ),
-        RegEnable( dataw, 0.U(8.W), isEnW & addrw === ( "h408".U (16.W) + (4*i).U ) ),
+        RegEnable( dataw, "hFF".U(8.W), isEnW & addrw === ( "h40b".U (16.W) + (4*i).U ) ),
+        RegEnable( dataw, "hFF".U(8.W), isEnW & addrw === ( "h40a".U (16.W) + (4*i).U ) ),
+        RegEnable( dataw, "hFF".U(8.W), isEnW & addrw === ( "h409".U (16.W) + (4*i).U ) ),
+        RegEnable( dataw, "hFF".U(8.W), isEnW & addrw === ( "h408".U (16.W) + (4*i).U ) ),
       )
   }
 }
@@ -1201,7 +1201,7 @@ trait InterfaceSystem{ this: InterfaceBase =>
     (io.intMstTrig(1) & cReg.intEnable(1)) | //主站接收完成
     (isLocalSyncInt   & cReg.intEnable(2)) | //主站发送周期到了
     (isLatchEvent     & cReg.intEnable(3)) | //latch Event
-    (~RegNext(isWdtTrigAndEnable, false.B) & isWdtTrigAndEnable & cReg.intEnable(4)) | //主站接收看门狗溢出
+    (isWdtTrigAndEnable & cReg.intEnable(4)) | //主站接收看门狗溢出
     (0 until 8).map{ i => io.intSlvTrig(i) & cReg.intEnable(8+i)}.reduce(_|_) | //从站SM请求
     (0 until 4).map{ i => io.intTransEnd(i) & cReg.intEnable(16+i)}.reduce(_|_) | //传输完成请求 16,17,18,19
     isMstRecCRCErr | //override //主站状态下19为上行crc接收错误 //不会同时发生
diff --git a/src/main/scala/backBoard/shin/ShinTop.scala b/src/main/scala/backBoard/shin/ShinTop.scala
index 8c39a01..d4e9bf5 100644
--- a/src/main/scala/backBoard/shin/ShinTop.scala
+++ b/src/main/scala/backBoard/shin/ShinTop.scala
@@ -422,7 +422,7 @@ trait ShinTopWatchDog{ this: ShinTopBase =>
   for( i <- 0 until 16 ){
     when( isWdtSMEnable(i) & (wdtSMCnt(i) < interface.io.cReg.wdtTarCnt(i+1)) ){
       wdtSMCnt(i) := wdtSMCnt(i) + 1.U
-    } .elsewhen( ~isWdtSMEnable(i) ){
+    } .elsewhen( ~isWdtSMEnable(i) || (wdtSMCnt(i) >= interface.io.cReg.wdtTarCnt(i+1)) ){
       wdtSMCnt(i) := 0.U
     }
 
@@ -446,7 +446,7 @@ trait ShinTopWatchDog{ this: ShinTopBase =>
 
   when( isWdtRec2RtnEnable & (wdtRec2RtnCnt < interface.io.cReg.wdtTarCnt(0)) ){
     wdtRec2RtnCnt := wdtRec2RtnCnt + 1.U
-  } .elsewhen( ~isWdtRec2RtnEnable ){
+  } .elsewhen( ~isWdtRec2RtnEnable || (wdtRec2RtnCnt >= interface.io.cReg.wdtTarCnt(0)) ){
     wdtRec2RtnCnt := 0.U
   }
 
@@ -460,8 +460,9 @@ trait ShinTopWatchDog{ this: ShinTopBase =>
   when( interface.io.cReg.wdtEnable.extract(17) & (wdtRec2RecCnt < interface.io.cReg.wdtTarCnt(17)) ){
     wdtRec2RecCnt := wdtRec2RecCnt + 1.U
   } .elsewhen(
-    ~interface.io.cReg.wdtEnable.extract(17) |
-    downCDRIn.io.axis.fire
+    ~interface.io.cReg.wdtEnable.extract(17) ||
+    downCDRIn.io.axis.fire || 
+    (wdtRec2RecCnt >= interface.io.cReg.wdtTarCnt(17))
   ){
     wdtRec2RecCnt := 0.U
   }