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makefile被覆盖,提交新的makefile

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bacon
2025-09-15 16:58:34 +08:00
parent 2ecb547bc8
commit bffe4fcab1
1 changed files with 1 additions and 0 deletions
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Makefile
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@@ -64,6 +64,7 @@ testShinClk:
python3 ./tb/shinTest/check_testcase.py python3 ./tb/shinTest/check_testcase.py
testCDR: testCDR:
python3 ./tb/shinTest/gen_sim_cdr_clk.py --clk 0 40
iverilog -Wall \ iverilog -Wall \
-o ./tb/build/simCDR.iverilog \ -o ./tb/build/simCDR.iverilog \
-y ./generated/SimCDR \ -y ./generated/SimCDR \