dma通路完成，可以承载背靠背负载

2023-11-10 15:47:43 +08:00
parent a3cc3d1d3d
commit b6767e5187
7 changed files with 32 additions and 27 deletions
--- a/src/main/scala/Switch/Robin.scala
+++ b/src/main/scala/Switch/Robin.scala
@@ -34,7 +34,7 @@ class Robin(implicit p: Parameters) extends SwitchModule{
  val lockChn = Reg(UInt((log2Ceil(chn+1)).W))
  io.sel := lockChn

-  val lfsr = ~LFSR( log2Ceil(chn+1), ~isLock)
+  val lfsr = ~LFSR( (log2Ceil(chn+1)+1), ~isLock)

  for( i <- 0 until chn+1 ) {
    when( i.U === lfsr ){