确认波形

src/main/scala/backBoard/ebus/CDRIn.scala

@@ -93,7 +93,6 @@ trait CDRInMultiSample{ this: CDRInBase =>
 
   val clearCnt = Reg(UInt(4.W))
   val checkCnt = Reg(UInt(4.W))
-  val arbLock = Reg(UInt( (log2Ceil(8*clkNum)).W ))
   val arbCali = Reg(UInt( (log2Ceil(8*clkNum)).W ))
   val isLock = RegInit(false.B)
 
@@ -149,7 +148,6 @@ trait CDRInMultiSample{ this: CDRInBase =>
     for( i <- 0 until 16 ){
       val j = 50+16 - i - 1
       when( flitReg(j) ^ flitReg(j+1) ){
-        arbLock := j.U
         arbCali := j.U
       }
     }