为多相位模拟增加命令行,增加8b10b切换的测试

This commit is contained in:
2025-09-08 16:47:30 +08:00
parent a63e14e6f6
commit 9c43daf51e
8 changed files with 155 additions and 41 deletions

View File

@@ -24,12 +24,32 @@ testShin_vcs:
testShinClk_vcs:
python3 ./shinTest/gen_pkt_clk.py
python3 ./shinTest/gen_pkt_clk.py --dev1 0 90 --dev2 0 -90
mkdir -p generated/log
rm -rf generated/log/*
${VCS} -f ./shinTestClk_vcs.f
${SIM}
python3 ./shinTest/check_testcase.py
mv spi_trans_data.txt generated/spi_trans_data1.txt
mv generated/wave.vcd generated/wave1.vcd
\
python3 ./shinTest/gen_pkt_clk.py --dev1 45 180 --dev3 25 -180
mkdir -p generated/log
rm -rf generated/log/*
${VCS} -f ./shinTestClk_vcs.f
${SIM}
python3 ./shinTest/check_testcase.py
mv spi_trans_data.txt generated/spi_trans_data2.txt
mv generated/wave.vcd generated/wave2.vcd
\
python3 ./shinTest/gen_pkt_clk.py --dev1 45 190 --dev3 25 -190
mkdir -p generated/log
rm -rf generated/log/*
${VCS} -f ./shinTestClk_vcs.f
${SIM}
python3 ./shinTest/check_testcase.py
mv spi_trans_data.txt generated/spi_trans_data3.txt
mv generated/wave.vcd generated/wave3.vcd
testShinMany_vcs:
@@ -58,7 +78,7 @@ testShin:
./shinTest/check_testcase.py
testShinClk:
./shinTest/gen_pkt_clk.py
./shinTest/gen_pkt_clk.py --dev1 0 200
mkdir -p generated/log
rm -rf generated/log/*
iverilog -Wall \
@@ -77,4 +97,4 @@ fstShinClk:
gtkwave ./generated/wave_clk.fst 1>/dev/null 2>&1 &
clean:
rm -rf ./generated/log/* ./generated/shin/*.vh ./generated/shinTest.* ./generated/wave*.*
rm -rf ./generated/log/* ./generated/shin/*.vh ./generated/shinTest.* ./generated/wave*.* ./generated/spi_trans*.*