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a sign for tx/rx clock merge

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This commit is contained in:
RuigeLee
2023-09-19 18:03:30 +08:00
parent 4702991e69
commit 8a9aa0436c
1 changed files with 5 additions and 1 deletions
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6
src/main/scala/mac/MAC.scala
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@@ -67,6 +67,8 @@ class MacIO extends Bundle with MDIO{
val mcrs_pad_i = Input(Bool()) val mcrs_pad_i = Input(Bool())
// val int_o = Output(Bool()) // val int_o = Output(Bool())
val isLoopBack = Output(Bool())
} }
class MacImp(outer: Mac)(implicit p: Parameters) extends LazyModuleImp(outer) with HasMacParameters{ class MacImp(outer: Mac)(implicit p: Parameters) extends LazyModuleImp(outer) with HasMacParameters{
@@ -492,7 +494,9 @@ dontTouch(Collision )
dontTouch(CarrierSense_Tx2) dontTouch(CarrierSense_Tx2)
dontTouch(RxEnSync ) dontTouch(RxEnSync )
printf("Warning! clock doesn't switch when loopBck!")
io.isLoopBack := r_LoopBck
// Muxed MII receive data valid // Muxed MII receive data valid
MRxDV_Lb := Mux(r_LoopBck, io.mtxen_pad_o, io.mrxdv_pad_i & RxEnSync) MRxDV_Lb := Mux(r_LoopBck, io.mtxen_pad_o, io.mrxdv_pad_i & RxEnSync)