将vcs仿真流程修正得更好

tb/shinTest/ShinTopSpiTb_clk.v

@@ -382,7 +382,8 @@ initial begin
 
 	$display("Time Out !!!");
   	$fclose(spidata_file);
-	$stop;
+	//$stop;
+    $finish;
 end
 
 initial begin
@@ -448,8 +449,15 @@ initial
 begin
   	spidata_file = $fopen("spi_trans_data.txt", "w");
   	if (!spidata_file) $display("文件打开失败");
-	$dumpfile("./generated/wave_clk.fst"); //生成的vcd文件名称
+    `ifdef VCS_COMPILE
+    $dumpfile("./generated/wave.vcd"); //生成的vcd文件名称
 	$dumpvars(0, ShinTopSpiTb);//tb模块名称
+    `endif
+
+    `ifdef IVERILOG_COMPILE
+	$dumpfile("./generated/wave.fst"); //生成的fst文件名称
+	$dumpvars(0, ShinTopSpiTb);//tb模块名称
+    `endif
 end
 
 always @(posedge reset) begin
@@ -1102,7 +1110,8 @@ initial begin
   #100000000000
   $display("Testcase Finished! Time Out !!!");
   $fclose(spidata_file);
-	$stop;
+  //$stop;
+  $finish;
 
 end