From 8a7e4981fbd7edda9b1a77d2a44cf93fc0484587 Mon Sep 17 00:00:00 2001 From: bacon Date: Sun, 7 Sep 2025 00:10:41 +0800 Subject: [PATCH] =?UTF-8?q?=E5=B0=86vcs=E4=BB=BF=E7=9C=9F=E6=B5=81?= =?UTF-8?q?=E7=A8=8B=E4=BF=AE=E6=AD=A3=E5=BE=97=E6=9B=B4=E5=A5=BD?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- Makefile | 3 +++ tb/shinTest/Makefile_vcs | 21 ++++++++++++++++----- tb/shinTest/ShinTopSpiTb.v | 16 +++++++++++++--- tb/shinTest/ShinTopSpiTb_clk.v | 15 ++++++++++++--- tb/shinTest/shinTest_vcs.f | 2 +- 5 files changed, 45 insertions(+), 12 deletions(-) diff --git a/Makefile b/Makefile index 82dc42e..857268e 100644 --- a/Makefile +++ b/Makefile @@ -49,6 +49,7 @@ testShin: -y ./generated/shin \ -I ./generated/shin \ -D RANDOMIZE_REG_INIT \ + -D IVERILOG_COMPILE \ ./tb/shinTest/ShinTopSpiTb.v vvp -N ./tb/build/shinTest.iverilog -lxt2 -fst || true ./tb/shinTest/check_testcase.py @@ -62,6 +63,7 @@ testShinClk: -y ./generated/shin \ -I ./generated/shin \ -D RANDOMIZE_REG_INIT \ + -D IVERILOG_COMPILE \ ./tb/shinTest/ShinTopSpiTb_clk.v vvp -N ./tb/build/shinTest_clk.iverilog -lxt2 -fst || true ./tb/shinTest/check_testcase.py @@ -74,6 +76,7 @@ testCDR: -I ./generated/SimCDR \ -I ./generated/shin \ -D RANDOMIZE_REG_INIT \ + -D IVERILOG_COMPILE \ ./tb/shinTest/SimCDRTb.v vvp -N ./tb/build/simCDR.iverilog -lxt2 -fst diff --git a/tb/shinTest/Makefile_vcs b/tb/shinTest/Makefile_vcs index 9998fe8..12799b3 100644 --- a/tb/shinTest/Makefile_vcs +++ b/tb/shinTest/Makefile_vcs @@ -2,11 +2,12 @@ OUTPUT = shin_test -VCS = vcs -sverilog +v2k -timescale=1ns/1ps \ - -debug_all \ - -full64 \ - -o ${OUTPUT} \ - -l compile.log \ +VCS = vcs -sverilog +v2k -timescale=1ns/1ps \ + -full64 \ + -o ${OUTPUT} \ + -l compile.log \ + -debug_access+none \ + +define+VCS_COMPILE \ SIM = ./${OUTPUT} -l run.log @@ -16,6 +17,16 @@ testShin_vcs: rm -rf generated/log/* ${VCS} -f ./shinTest_vcs.f ${SIM} + python3 ./shinTest/check_testcase.py + +testShinClk_vcs: + python3 ./shinTest/gen_pkt_clk.py + mkdir -p generated/log + rm -rf generated/log/* + ${VCS} -f ./shinTestClk_vcs.f + ${SIM} + python3 ./shinTest/check_testcase.py + sim: ${SIM} diff --git a/tb/shinTest/ShinTopSpiTb.v b/tb/shinTest/ShinTopSpiTb.v index 8cb819f..a4bf400 100644 --- a/tb/shinTest/ShinTopSpiTb.v +++ b/tb/shinTest/ShinTopSpiTb.v @@ -407,7 +407,8 @@ initial begin $display("Time Out !!!"); $fclose(spidata_file); - $stop; + //$stop; + $finish; end initial begin @@ -438,8 +439,16 @@ initial begin spidata_file = $fopen("spi_trans_data.txt", "w"); if (!spidata_file) $display("文件打开失败"); - $dumpfile("./generated/wave.fst"); //生成的vcd文件名称 + + `ifdef VCS_COMPILE + $dumpfile("./generated/wave.vcd"); //生成的vcd文件名称 $dumpvars(0, ShinTopSpiTb);//tb模块名称 + `endif + + `ifdef IVERILOG_COMPILE + $dumpfile("./generated/wave.fst"); //生成的fst文件名称 + $dumpvars(0, ShinTopSpiTb);//tb模块名称 + `endif end always @(posedge reset) begin @@ -1092,7 +1101,8 @@ initial begin #1000000 $display("Testcase Finished! Time Out !!!"); $fclose(spidata_file); - $stop; + //$stop; + $finish; end diff --git a/tb/shinTest/ShinTopSpiTb_clk.v b/tb/shinTest/ShinTopSpiTb_clk.v index 69e7043..30ce999 100644 --- a/tb/shinTest/ShinTopSpiTb_clk.v +++ b/tb/shinTest/ShinTopSpiTb_clk.v @@ -382,7 +382,8 @@ initial begin $display("Time Out !!!"); $fclose(spidata_file); - $stop; + //$stop; + $finish; end initial begin @@ -448,8 +449,15 @@ initial begin spidata_file = $fopen("spi_trans_data.txt", "w"); if (!spidata_file) $display("文件打开失败"); - $dumpfile("./generated/wave_clk.fst"); //生成的vcd文件名称 + `ifdef VCS_COMPILE + $dumpfile("./generated/wave.vcd"); //生成的vcd文件名称 $dumpvars(0, ShinTopSpiTb);//tb模块名称 + `endif + + `ifdef IVERILOG_COMPILE + $dumpfile("./generated/wave.fst"); //生成的fst文件名称 + $dumpvars(0, ShinTopSpiTb);//tb模块名称 + `endif end always @(posedge reset) begin @@ -1102,7 +1110,8 @@ initial begin #100000000000 $display("Testcase Finished! Time Out !!!"); $fclose(spidata_file); - $stop; + //$stop; + $finish; end diff --git a/tb/shinTest/shinTest_vcs.f b/tb/shinTest/shinTest_vcs.f index 8e99223..e91eee2 100644 --- a/tb/shinTest/shinTest_vcs.f +++ b/tb/shinTest/shinTest_vcs.f @@ -1,5 +1,5 @@ +incdir+./generated/shin -./shinTest/ShinTopSpiTb.v +./shinTest/ShinTopSpiTb_clk.v ./generated/shin/b4b5DualEncode.v ./generated/shin/ShareSRAM2k.v ./generated/shin/QSpiInterface.v