尚不明原因的造成了cpu的CoreID初始化错乱，导致了日志文件不能正常分离；简单粗暴地删除一个不想要的初始化语句，用以解决CoreID的错乱问题

Makefile

@@ -18,7 +18,8 @@ compile:
 	mkdir -p ./generated/Rtpp
 	cd ./rocket-chip/ && rm -f rocketchip.jar
 	cd ./rocket-chip/vsim && make verilog CONFIG=freechips.rocketchip.system.RtppConfig
-	cp ./rocket-chip/vsim/generated-src/freechips.rocketchip.system.RtppConfig.v ./generated/Rtpp/RtppConfig.v
+	sed -e "s/CoreID = _RAND/\/\/CoreID = _RAND/g" ./rocket-chip/vsim/generated-src/freechips.rocketchip.system.RtppConfig.v > ./generated/Rtpp/RtppConfig.v
+#	cp ./rocket-chip/vsim/generated-src/freechips.rocketchip.system.RtppConfig.v ./generated/Rtpp/RtppConfig.v
 	cp ./rocket-chip/vsim/generated-src/freechips.rocketchip.system.RtppConfig.behav_srams.v ./generated/Rtpp/behav_srams.v
 # 	sbt "test:runMain test.testModule"
 
@@ -54,6 +55,7 @@ VSimTop:
 	+define+RANDOMIZE_INVALID_ASSIGN \
 	+define+RANDOMIZE_REG_INIT \
 	+define+RANDOMIZE_DELAY=0 \
+	+define+VERILATOR \
 	--exe --build \
 	${PWD}/tb/verilator/sim_main.cpp \
 	-Mdir ./tb/build/ \