增加两组寄存器

src/main/scala/backBoard/shin/ShinTop.scala

@@ -32,6 +32,9 @@ class ShinTopIO extends Bundle{
   val latchPin = Input(Vec(2, Bool()))
   val hwSerial = Input(UInt(48.W))
   val uniCode = Input(UInt(64.W))
+
+  val pllCtrl = Output(UInt(32.W))
+  val xtal    = Output(UInt(12.W))
 }
 
 
@@ -80,6 +83,9 @@ abstract class ShinTopBase extends Module{
   io.iSync := interface.io.sync
   io.oSync := interface.io.sync
 
+  io.pllCtrl := interface.io.cReg.pllCtrl
+  io.xtal    := interface.io.cReg.xtal(11,0)
+
   val sram = Seq(
     for( _ <- 0 until 4 ) yield { Module(new ShareSRAM2k) },
     for( _ <- 0 until 4 ) yield { Module(new ShareSRAM2k) },