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现场基本恢复

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This commit is contained in:
Ruige Lee
2025-04-25 17:00:51 +08:00
parent dc67286e23
commit 7b63b07408
5 changed files with 592 additions and 35 deletions
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23
src/main/scala/backBoard/shin/SlaveParser.scala
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@@ -399,18 +399,19 @@ trait SlaveParserRW{ this: SlaveParserBase =>
val isWRSM6 = (addrw(14,11) === "b0111".U)
when( downRecParser.io.subMsgReq.fire ){
when( downRecParser.io.subMsgReq.bits.devIndex === localDevIndex ){
addrw := downRecParser.io.subMsgReq.bits.address
}
}
val isWrite = (downRecParser.io.stateCurr === STATE_PAYLOAD_DATA) & ( //req fire 后 已经反相
( ~isDownRecPing & (downSubMsgInfo(0).devIndex === localDevIndex) & ( (downSubMsgInfo(0).operator === 1.U) | (downSubMsgInfo(0).operator === 3.U) )) |
( isDownRecPing & (downSubMsgInfo(1).devIndex === localDevIndex) & ( (downSubMsgInfo(1).operator === 1.U) | (downSubMsgInfo(1).operator === 3.U) ))
)
when( downRecParser.io.subMsgReq.fire & downRecParser.io.subMsgReq.bits.devIndex === localDevIndex ){
addrw := downRecParser.io.subMsgReq.bits.address
} .elsewhen( isWrite ){
addrw := addrw + 1.U
}
io.sram_w(0).enw := isWrite & isWRSM0
@@ -458,8 +459,12 @@ trait SlaveParserRW{ this: SlaveParserBase =>
//读出uSM
val isRead =
((upRecParser.io.stateCurr === STATE_PAYLOAD_DATA) & (upSubMsgInfo(0).devIndex === localDevIndex) & (upSubMsgInfo(0).operator === 2.U | upSubMsgInfo(0).operator === 3.U)) |
((upRecParser.io.stateCurr === STATE_PAYLOAD_DATA) & (
(~isUpRecPing & upSubMsgInfo(0).devIndex === localDevIndex & (upSubMsgInfo(0).operator === 2.U | upSubMsgInfo(0).operator === 3.U)) |
( isUpRecPing & upSubMsgInfo(1).devIndex === localDevIndex & (upSubMsgInfo(1).operator === 2.U | upSubMsgInfo(1).operator === 3.U))
) |
((upRecParser.io.stateNext === STATE_PAYLOAD_DATA) & (upRecParser.io.subMsgReq.bits.devIndex === localDevIndex) & (upRecParser.io.subMsgReq.bits.operator === 2.U | upRecParser.io.subMsgReq.bits.operator === 3.U))
)
val addrr = Reg(UInt(15.W))
val readSMAddr = Mux1H(Seq(
@@ -475,6 +480,8 @@ trait SlaveParserRW{ this: SlaveParserBase =>
when( upRecParser.io.subMsgReq.fire & upRecParser.io.subMsgReq.bits.devIndex === localDevIndex ){
addrr := upRecParser.io.subMsgReq.bits.address
} .elsewhen( isRead ){
addrr := addrr + 1.U
}
val upStreamData = Mux1H(Seq(