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islastdev体现寄存器修改

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Ruige Lee
2025-05-16 20:22:51 +08:00
parent df4f4f445b
commit 784bad548a
1 changed files with 1 additions and 1 deletions
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src/main/scala/backBoard/shin/SlaveParser.scala
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@@ -100,7 +100,7 @@ abstract class SlaveParserBase extends Module{
// val isDevOnLeft = RegInit(0.U(2.W)); io.isDevOnLeft := isDevOnLeft // val isDevOnLeft = RegInit(0.U(2.W)); io.isDevOnLeft := isDevOnLeft
val isDevOnLeftModify = RegInit(false.B); io.isDevOnLeftModify := isDevOnLeftModify val isDevOnLeftModify = RegInit(false.B); io.isDevOnLeftModify := isDevOnLeftModify
val indexOfLeftDev = RegInit(0.U(14.W)); io.indexOfLeftDev := indexOfLeftDev val indexOfLeftDev = RegInit(0.U(14.W)); io.indexOfLeftDev := indexOfLeftDev
io.isDevOnRight := Mux( isLastDevice, "b01".U, "b10".U ) io.isDevOnRight := Mux( isLastDevice, "b00".U, "b01".U )
val isDevOnRightModify = RegInit(false.B); io.isDevOnRightModify := isDevOnRightModify val isDevOnRightModify = RegInit(false.B); io.isDevOnRightModify := isDevOnRightModify
val indexOfRightDev = RegInit(0.U(14.W)); io.indexOfRightDev := indexOfRightDev val indexOfRightDev = RegInit(0.U(14.W)); io.indexOfRightDev := indexOfRightDev