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This commit is contained in:
bacon
2025-02-09 01:17:17 +08:00
parent 55675b93c9
commit 6e72db048a
9 changed files with 441 additions and 307 deletions
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116
tb/sw/tl2cdr/tl2cdr.c
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@@ -5,6 +5,7 @@
#error TL2CDR Base address not define!!!
#endif
#ifdef OLD_CODE
volatile uint32_t * const cdr_status = (uint32_t*)( TL2CDR_BASE + CDR_ReadStatus ); //read
volatile uint32_t * const cdr_txLen = (uint32_t*)( TL2CDR_BASE + CDR_WriteTxLen ); //write
volatile uint32_t * const cdr_txFifo = (uint32_t*)( TL2CDR_BASE + CDR_WriteTxFifo ); //write
@@ -17,93 +18,32 @@ volatile uint32_t * const cdr_rxFifo = (uint32_t*)( TL2CDR_BASE + CDR_ReadRxF
volatile uint32_t * const cdr_IsLast = (uint32_t*)( TL2CDR_BASE + CDR_ReadIsLast ); //read
volatile uint32_t * const cdr_rxCrc = (uint32_t*)( TL2CDR_BASE + CDR_ReadRxCrc );
volatile uint32_t * const cdr_txCrc = (uint32_t*)( TL2CDR_BASE + CDR_ReadTxCrc);
#if 0
void cdr_set_downStream(){
*cdr_softReset = 1; //复位脉冲
*cdr_direct = 0;
}
void cdr_set_upStream(){
*cdr_softReset = 1; //复位脉冲
*cdr_direct = 1;
}
void cdr_simple_tx( uint32_t txLen, uint8_t operator, uint8_t* data){
//发送下行包头
assert(txLen < 2^12);
assert(txLen > 8 );
assert(txLen % 4 == 0 );
assert(operator < 2^4);
*cdr_txLen = txLen;
*cdr_txFifo = (uint32_t)( txLen << 20) | ( operator << 16) | 0x0000;
*cdr_txFifo = (uint32_t)0x00;
for( uint32_t i = 0; i < (txLen-8)/4; i ++ ){
*cdr_txFifo = data[4*i+3]<< 24 | data[4*i+2]<<16 | data[4*i+1]<< 8 | data[4*i+0] << 0;
}
}
uint32_t cdr_wait_tx_finish(){
// //等待发送完成标志
// asm volatile (
// "1:\n"
// "andi %0, sp, 0x01\n"
// "beqz %0, 1b\n"
// "andi sp, sp, 0xFE\n"
// :"+r"(flag)
// );
}
uint32_t cdr_wait_rx_start(){
//接收第一个包
asm volatile (
"1:\n"
"andi %0, sp, 0x04\n"
"beqz %0, 1b\n"
"andi sp, sp, 0xFB\n"
:"+r"(flag)
);
}
uint32_t cdr_check_rx_fail(){
}
void cdr_simple_rx(uint32_t* rxLen, uint8_t* operator, uint8_t* data){
uint32_t readDat;
readDat = *cdr_rxFifo;
*operator = (readDat >> 16) & 0xf;
*rxLen = readDat >> 20;
readDat = *cdr_rxFifo;
for( uint32_t i = 0; i < ( *rxLen >> 2); i ++ ){ //一次传4byte
readDat = *cdr_rxFifo;
data[4*i+1] = (uint8_t)( (readDat >> 0) & 0xFF);
data[4*i+0] = (uint8_t)( (readDat >> 8) & 0xFF);
data[4*i+2] = (uint8_t)( (readDat >> 16) & 0xFF);
data[4*i+3] = (uint8_t)( (readDat >> 24) & 0xFF);
}
//CRC
uint32_t crc = *cdr_rxFifo; //CRC
}
void cdr_slave_function(){
}
#endif
volatile uint32_t * const tx0_softReset = (uint32_t*)( TL2CDR_BASE + TX0_WriteSoftReset );
volatile uint32_t * const tx0_txLen = (uint32_t*)( TL2CDR_BASE + TX0_WriteTxLen );
volatile uint32_t * const tx0_txFifo = (uint32_t*)( TL2CDR_BASE + TX0_WriteTxFifo );
volatile uint32_t * const tx0_txCrc = (uint32_t*)( TL2CDR_BASE + TX0_ReadTxCrc );
volatile uint32_t * const tx1_softReset = (uint32_t*)( TL2CDR_BASE + TX1_WriteSoftReset );
volatile uint32_t * const tx1_txLen = (uint32_t*)( TL2CDR_BASE + TX1_WriteTxLen );
volatile uint32_t * const tx1_txFifo = (uint32_t*)( TL2CDR_BASE + TX1_WriteTxFifo );
volatile uint32_t * const tx1_txCrc = (uint32_t*)( TL2CDR_BASE + TX1_ReadTxCrc );
volatile uint32_t * const rx0_softReset = (uint32_t*)( TL2CDR_BASE + RX0_WriteSoftReset );
volatile uint32_t * const rx0_rxLen = (uint32_t*)( TL2CDR_BASE + RX0_ReadRxLen );
volatile uint32_t * const rx0_rxFifo = (uint32_t*)( TL2CDR_BASE + RX0_ReadRxFifo );
volatile uint32_t * const rx0_rxCrc = (uint32_t*)( TL2CDR_BASE + RX0_ReadRxCrc );
volatile uint32_t * const rx0_rxTimerAim = (uint32_t*)( TL2CDR_BASE + RX0_WrtieLimitTimerAim );
volatile uint32_t * const rx0_rxTxPair = (uint32_t*)( TL2CDR_BASE + RX0_WriteLimitTxPair );
volatile uint32_t * const rx1_softReset = (uint32_t*)( TL2CDR_BASE + RX1_WriteSoftReset );
volatile uint32_t * const rx1_rxLen = (uint32_t*)( TL2CDR_BASE + RX1_ReadRxLen );
volatile uint32_t * const rx1_rxFifo = (uint32_t*)( TL2CDR_BASE + RX1_ReadRxFifo );
volatile uint32_t * const rx1_rxCrc = (uint32_t*)( TL2CDR_BASE + RX1_ReadRxCrc );
volatile uint32_t * const rx1_rxTimerAim = (uint32_t*)( TL2CDR_BASE + RX1_WrtieLimitTimerAim );
volatile uint32_t * const rx1_rxTxPair = (uint32_t*)( TL2CDR_BASE + RX1_WriteLimitTxPair );
volatile uint32_t * const HLM_status = (uint32_t*)( TL2CDR_BASE + HLM_ReadStatus );
volatile uint32_t * const HLM_isLast = (uint32_t*)( TL2CDR_BASE + HLM_ReadIsLast );