开放第15页2~9地址

2025-03-11 10:19:24 +08:00
parent bcb1c8e8f3
commit 1da2747d44
9 changed files with 67 additions and 42 deletions
--- a/src/main/verilog/do16_top.v
+++ b/src/main/verilog/do16_top.v
@@ -292,6 +292,14 @@ DOut16 i_dout16(
  .io_isLast(isLast_temp1),
  .io_DCIn(DCIn),

+  .param_data2(`DATA2),
+  .param_data3(`DATA3),
+  .param_data4(`DATA4),
+  .param_data5(`DATA5),
+  .param_data6(`DATA6),
+  .param_data7(`DATA7),
+  .param_data8(`DATA8),
+  .param_data9(`DATA9),
  .param_vendorID(`VENDORID),
  .param_moduleID(`MODULEID),
  .param_hwVersion(`HWVERSION),