开放第15页2~9地址

2025-03-11 10:19:24 +08:00
parent bcb1c8e8f3
commit 1da2747d44
9 changed files with 67 additions and 42 deletions
--- a/src/main/verilog/defineParam.v
+++ b/src/main/verilog/defineParam.v
@@ -1,3 +1,13 @@
+`define DATA2     8'h0
+`define DATA3     8'h0
+`define DATA4     8'h0
+`define DATA5     8'h0
+`define DATA6     8'h0
+`define DATA7     8'h0
+`define DATA8     8'h0
+`define DATA9     8'h0
+
+
 `define VENDORID  16'h1122
 `define MODULEID  16'h3344
 `define HWVERSION 16'h5566