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CDR基本测试通过

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RuigeLee
2024-09-19 15:23:38 +08:00
parent 57c81d5cac
commit 1368e9037d
5 changed files with 161 additions and 19 deletions
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4
Makefile
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@@ -117,13 +117,15 @@ VSimBack:
tb:
cp ./generated/cdr/crc32_8.v ./tb
cp ./generated/cdr/CDRIn.v ./tb
cp ./generated/cdr/CDROut.v ./tb
iverilog -Wall \
-o ./build/wave.iverilog \
-y ./tb \
-I ./tb \
-D RANDOMIZE_REG_INIT \
./tb/cdrOut_tb.v
./tb/cdrInOut_tb.v
vvp -N ./build/wave.iverilog -lxt2
vcd: