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进一步参数化代码

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bacon
2025-08-16 18:46:19 +08:00
parent be792e000a
commit 0978a5d72b
1 changed files with 23 additions and 3 deletions
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26
tb/shinTest/ShinTopSpiTb.v
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@@ -57,7 +57,23 @@ module ShinTopSpiTb(
`define IQSPI_CSN(id) spi_csn[`IQSPI_CSN_NUM(`id)] `define IQSPI_CSN(id) spi_csn[`IQSPI_CSN_NUM(`id)]
`define ESPI_CSN(id) spi_csn[`ESPI_CSN_NUM(`id)] `define ESPI_CSN(id) spi_csn[`ESPI_CSN_NUM(`id)]
`define EQSPI_CSN(id) spi_csn[`EQSPI_CSN_NUM(`id)] `define EQSPI_CSN(id) spi_csn[`EQSPI_CSN_NUM(`id)]
`define QSPI_MUX_MISO_INIT \
(`IQSPI_MISO(0) & ~{4{`IQSPI_CSN(0)}}) |\
(`IQSPI_MISO(1) & ~{4{`IQSPI_CSN(1)}}) |\
(`IQSPI_MISO(2) & ~{4{`IQSPI_CSN(2)}}) |\
(`IQSPI_MISO(3) & ~{4{`IQSPI_CSN(3)}}) |\
(`IQSPI_MISO(4) & ~{4{`IQSPI_CSN(4)}}) |\
(`EQSPI_MISO(0) & ~{4{`EQSPI_CSN(0)}}) |\
(`EQSPI_MISO(1) & ~{4{`EQSPI_CSN(1)}}) |\
(`EQSPI_MISO(2) & ~{4{`EQSPI_CSN(2)}}) |\
(`EQSPI_MISO(3) & ~{4{`EQSPI_CSN(3)}}) |\
(`EQSPI_MISO(4) & ~{4{`EQSPI_CSN(4)}})
`define SPI_MUX_MISO_INIT \
( spi_miso[0] & ~`ESPI_CSN(0)) |\
( spi_miso[1] & ~`ESPI_CSN(1)) |\
( spi_miso[2] & ~`ESPI_CSN(2)) |\
( spi_miso[3] & ~`ESPI_CSN(3)) |\
( spi_miso[4] & ~`ESPI_CSN(4))
wire [(`DEV_NUM - 1):0] dDat_w; wire [(`DEV_NUM - 1):0] dDat_w;
wire [(`DEV_NUM - 1):0] uDat_w; wire [(`DEV_NUM - 1):0] uDat_w;
@@ -438,7 +454,7 @@ end
assign spi_mosi = exChangeRego[7]; assign spi_mosi = exChangeRego[7];
assign qspi_mosi = exChangeRego[7:4]; assign qspi_mosi = exChangeRego[7:4];
wire [3:0] qspi_mux_miso = wire [3:0] qspi_mux_miso = `QSPI_MUX_MISO_INIT;
//( qspi_miso[4*0+3:4*0] & ~{4{spi_csn[ 0]}}) | //( qspi_miso[4*0+3:4*0] & ~{4{spi_csn[ 0]}}) |
//( qspi_miso[4*1+3:4*1] & ~{4{spi_csn[ 1]}}) | //( qspi_miso[4*1+3:4*1] & ~{4{spi_csn[ 1]}}) |
//( qspi_miso[4*2+3:4*2] & ~{4{spi_csn[ 2]}}) | //( qspi_miso[4*2+3:4*2] & ~{4{spi_csn[ 2]}}) |
@@ -449,6 +465,7 @@ end
//( qspi_miso[4*7+3:4*7] & ~{4{spi_csn[12]}}) | //( qspi_miso[4*7+3:4*7] & ~{4{spi_csn[12]}}) |
//( qspi_miso[4*8+3:4*8] & ~{4{spi_csn[13]}}) | //( qspi_miso[4*8+3:4*8] & ~{4{spi_csn[13]}}) |
//( qspi_miso[4*9+3:4*9] & ~{4{spi_csn[14]}}); //( qspi_miso[4*9+3:4*9] & ~{4{spi_csn[14]}});
/*
(`IQSPI_MISO(0) & ~{4{`IQSPI_CSN(0)}}) | (`IQSPI_MISO(0) & ~{4{`IQSPI_CSN(0)}}) |
(`IQSPI_MISO(1) & ~{4{`IQSPI_CSN(1)}}) | (`IQSPI_MISO(1) & ~{4{`IQSPI_CSN(1)}}) |
(`IQSPI_MISO(2) & ~{4{`IQSPI_CSN(2)}}) | (`IQSPI_MISO(2) & ~{4{`IQSPI_CSN(2)}}) |
@@ -459,18 +476,21 @@ end
(`EQSPI_MISO(2) & ~{4{`EQSPI_CSN(2)}}) | (`EQSPI_MISO(2) & ~{4{`EQSPI_CSN(2)}}) |
(`EQSPI_MISO(3) & ~{4{`EQSPI_CSN(3)}}) | (`EQSPI_MISO(3) & ~{4{`EQSPI_CSN(3)}}) |
(`EQSPI_MISO(4) & ~{4{`EQSPI_CSN(4)}}); (`EQSPI_MISO(4) & ~{4{`EQSPI_CSN(4)}});
*/
wire spi_mux_miso = wire spi_mux_miso = `SPI_MUX_MISO_INIT;
//( spi_miso[0] & ~spi_csn[5] ) | //( spi_miso[0] & ~spi_csn[5] ) |
//( spi_miso[1] & ~spi_csn[6] ) | //( spi_miso[1] & ~spi_csn[6] ) |
//( spi_miso[2] & ~spi_csn[7] ) | //( spi_miso[2] & ~spi_csn[7] ) |
//( spi_miso[3] & ~spi_csn[8] ) | //( spi_miso[3] & ~spi_csn[8] ) |
//( spi_miso[4] & ~spi_csn[9] ); //( spi_miso[4] & ~spi_csn[9] );
/*
( spi_miso[0] & ~`ESPI_CSN(0)) | ( spi_miso[0] & ~`ESPI_CSN(0)) |
( spi_miso[1] & ~`ESPI_CSN(1)) | ( spi_miso[1] & ~`ESPI_CSN(1)) |
( spi_miso[2] & ~`ESPI_CSN(2)) | ( spi_miso[2] & ~`ESPI_CSN(2)) |
( spi_miso[3] & ~`ESPI_CSN(3)) | ( spi_miso[3] & ~`ESPI_CSN(3)) |
( spi_miso[4] & ~`ESPI_CSN(4)); ( spi_miso[4] & ~`ESPI_CSN(4));
*/
reg isReq = 0; reg isReq = 0;
reg isBusy = 0; reg isBusy = 0;