基本功能单元编译通过，开始搭建测试环境校对流水线

Makefile

@@ -36,6 +36,17 @@ back:
 	cp ./src/main/verilog/spi_top.v ./generated/back/
 	cp ./src/main/verilog/defineParam.v ./generated/back/
 
+shin:
+	rm -f ./generated/shin/*
+	sbt "test:runMain test.testShinModule"
+
+testShin:
+	iverilog -Wall \
+	-o ./tb/build/shinTest.iverilog  \
+	-y ./generated/shin \
+	-I ./generated/shin \
+	./tb/shinTest/SlaveParserTb.v 
+	vvp.exe  -N ./build/shinTest.iverilog -lxt2
 
 ef: 
 	sbt "test:runMain test.testModule"