eb001/tb/sw/src/slvStartup.S

#include "custom_ops.S"


.extern main
.globl _prog_start
.section .text.init


_prog_start:
	li sp, 0
	picorv32_maskirq_insn(zero, zero)

	call main


	ecall


.balign 32
.section .trap_entry, "ax", %progbits
trap_entry:
	# q0 return address
	# q1 bitmask of all IRQ to be handled, may be more than one IRQ 
	# q2 q3 unused, can be use as temp storage register

	# q寄存器已经禁用， Without the q-registers, the irq return address will be stored in x3 (gp) and the IRQ bitmask in x4 (tp),

	# addi x15, x4, 0

#   io.interrupt(0) := intTxError
#   io.interrupt(1) := intTxFifoFull
#   io.interrupt(2) := intTxFinish

#   io.interrupt(3) := intRxError
#   io.interrupt(4) := intRxValid
#   io.interrupt(5) := intTxError
#   io.interrupt(6) := intTxFifoFull
#   io.interrupt(7) := intTxFinish

#   io.interrupt(8) := intRxError
#   io.interrupt(9) := intRxValid
	# andi ra, x4, 0x02
	# bnez ra, 1f
	# addi, sp, sp, 2048
1:
	andi ra, x4, 0x10
	bnez ra, 2f
	addi sp, sp, 1
2:
	# andi ra, x4, 0x40
	# bnez ra, 3f
	# addi, sp, sp, 2048
3:
	andi ra, x4, 0x200
	bnez ra, 4f
	addi sp, sp, 1
4:
	picorv32_retirq_insn()