2025-05-12 15:41:11 +08:00
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`timescale 1 ns / 1 ps
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2025-05-23 18:48:21 +08:00
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`define ENABLE_REG_RW_TEST
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2025-05-23 15:45:20 +08:00
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`define ENABLE_DET_TEST
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`define ENABLE_SET_ADDR_TEST
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2025-06-04 09:50:36 +08:00
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`define ENABLE_INT_INIT_TEST
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2025-05-30 10:54:41 +08:00
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//`define ENABLE_SM1_SEND_TEST
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//`define ENABLE_SMx_SEND_TEST
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2025-05-30 16:06:38 +08:00
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2025-06-26 09:34:43 +08:00
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`define ENABLE_EXCHG_DATA_SEQ0_TEST
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2025-05-30 16:06:38 +08:00
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//`define ENABLE_EXCHG_DATA_SEQ1_TEST
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2025-06-26 16:37:12 +08:00
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`define ENABLE_EXCHG_DATA_SEQ2_TEST
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2025-06-17 19:46:44 +08:00
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//`define ENABLE_EXCHG_DATA_SEQ3_TEST
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2025-05-30 16:06:38 +08:00
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2025-05-30 16:59:02 +08:00
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//`define ENABLE_BC_R_TEST
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//`define ENABLE_BC_W_TEST
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2025-06-17 19:46:44 +08:00
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//`define ENABLE_BC_RW_TEST
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2025-05-30 16:06:38 +08:00
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2025-05-26 09:19:33 +08:00
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`define ENABLE_SYNC_TEST
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2025-06-26 16:37:12 +08:00
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//`define ENABLE_SYNC_SIG0_TEST
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//`define ENABLE_SYNC_SIG1_TEST
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//`define ENABLE_RESET_TEST
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2025-05-12 15:41:11 +08:00
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2025-06-20 15:08:48 +08:00
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//`define ENABLE_EBMMU_TC1_TEST
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//`define ENABLE_EBMMU_TC2_TEST
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//`define ENABLE_EBMMU_TC3_TEST
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2025-06-25 15:48:39 +08:00
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//`define ENABLE_EBMMU_TC4_TEST
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2025-06-19 15:36:44 +08:00
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2025-05-12 15:41:11 +08:00
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module ShinTopSpiTb(
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);
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reg clock;
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reg reset;
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reg clk8x;
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wire [3:0] dDat_w;
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wire [3:0] uDat_w;
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2025-05-12 19:52:30 +08:00
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wire spi_sck;
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wire spi_mosi;
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2025-05-17 12:20:07 +08:00
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wire [4:0] spi_miso;
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2025-05-14 16:26:20 +08:00
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reg [14:0] spi_csn;
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wire qspi_sck;
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wire [3:0] qspi_mosi;
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2025-05-17 12:20:07 +08:00
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wire [40-1:0] qspi_miso;
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2025-05-12 15:41:11 +08:00
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2025-05-13 10:31:35 +08:00
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wire isResp;
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2025-05-12 15:41:11 +08:00
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2025-05-16 18:07:22 +08:00
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integer spidata_file;
|
2025-05-16 18:49:00 +08:00
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integer c_line;
|
2025-05-23 12:56:24 +08:00
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integer _pos;
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integer _len;
|
2025-05-23 18:48:21 +08:00
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integer _t_start;
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integer _t_end;
|
2025-05-26 09:19:33 +08:00
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reg [63:0] _temp_time;
|
2025-06-04 10:16:46 +08:00
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reg _reset_deactive;
|
2025-05-16 18:07:22 +08:00
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2025-05-21 16:04:39 +08:00
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wire [4:0] isSoftReset;
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|
2025-06-03 17:07:08 +08:00
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wire [4:0] io_int_sig;
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|
2025-05-12 15:41:11 +08:00
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ShinTop s_ShinTop_Mst(
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.clock(clock),
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2025-05-21 16:04:39 +08:00
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.reset(reset | isSoftReset[0]),
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2025-05-12 15:41:11 +08:00
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.io_clk8x(clk8x),
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.io_dDatIn(1'b0),
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.io_dDatOut(dDat_w[0]),
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.io_uDatIn(uDat_w[0]),
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.io_uDatOut(),
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|
2025-05-14 16:26:20 +08:00
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.io_iqspi_sck(qspi_sck),
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.io_iqspi_mosi(qspi_mosi),
|
2025-05-17 12:20:07 +08:00
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.io_iqspi_miso(qspi_miso[3:0]),
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2025-05-14 16:26:20 +08:00
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.io_iqspi_isDirIn(),
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.io_iqspi_csn(spi_csn[0]),
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|
2025-05-12 19:52:30 +08:00
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.io_ospi_sck (spi_sck),
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.io_ospi_mosi(spi_mosi),
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2025-05-17 12:20:07 +08:00
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.io_ospi_miso(spi_miso[0]),
|
2025-05-14 16:26:20 +08:00
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.io_ospi_csn (spi_csn[5]),
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.io_oqspi_sck(qspi_sck),
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.io_oqspi_mosi(qspi_mosi),
|
2025-05-17 12:20:07 +08:00
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.io_oqspi_miso(qspi_miso[4*5+3:4*5]),
|
2025-05-14 16:26:20 +08:00
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.io_oqspi_isDirIn(),
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.io_oqspi_csn(spi_csn[10]),
|
2025-05-12 15:41:11 +08:00
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|
2025-05-13 10:31:35 +08:00
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.io_rsp_valid(isResp),
|
2025-05-21 16:04:39 +08:00
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.io_rsp_bits_isError(),
|
2025-05-23 17:22:59 +08:00
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.io_isSoftReset(isSoftReset[0]),
|
2025-06-03 17:07:08 +08:00
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.io_interrupt(io_int_sig[0])
|
2025-05-12 15:41:11 +08:00
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);
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ShinTop s_ShinTop_slv0(
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.clock(clock),
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2025-05-21 16:04:39 +08:00
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.reset(reset | isSoftReset[1]),
|
2025-05-12 15:41:11 +08:00
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.io_clk8x(clk8x),
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.io_dDatIn(dDat_w[0]),
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.io_dDatOut(dDat_w[1]),
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.io_uDatIn(uDat_w[1]),
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.io_uDatOut(uDat_w[0]),
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2025-05-14 16:26:20 +08:00
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.io_iqspi_sck(qspi_sck),
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.io_iqspi_mosi(qspi_mosi),
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2025-05-17 12:20:07 +08:00
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.io_iqspi_miso(qspi_miso[4*1+3:4*1]),
|
2025-05-14 16:26:20 +08:00
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.io_iqspi_isDirIn(),
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.io_iqspi_csn(spi_csn[1]),
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|
2025-05-12 19:52:30 +08:00
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.io_ospi_sck (spi_sck),
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.io_ospi_mosi(spi_mosi),
|
2025-05-17 12:20:07 +08:00
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.io_ospi_miso(spi_miso[1]),
|
2025-05-14 16:26:20 +08:00
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.io_ospi_csn (spi_csn[6]),
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.io_oqspi_sck(qspi_sck),
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.io_oqspi_mosi(qspi_mosi),
|
2025-05-17 12:20:07 +08:00
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.io_oqspi_miso(qspi_miso[4*6+3:4*6]),
|
2025-05-14 16:26:20 +08:00
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.io_oqspi_isDirIn(),
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.io_oqspi_csn(spi_csn[11]),
|
2025-05-12 15:41:11 +08:00
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.io_rsp_valid(),
|
2025-05-21 16:04:39 +08:00
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.io_rsp_bits_isError(),
|
2025-05-23 17:22:59 +08:00
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.io_isSoftReset(isSoftReset[1]),
|
2025-06-03 17:07:08 +08:00
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.io_interrupt(io_int_sig[1])
|
2025-05-12 15:41:11 +08:00
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);
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ShinTop s_ShinTop_slv1(
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.clock(clock),
|
2025-05-21 16:04:39 +08:00
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.reset(reset | isSoftReset[2]),
|
2025-05-12 15:41:11 +08:00
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.io_clk8x(clk8x),
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.io_dDatIn(dDat_w[1]),
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.io_dDatOut(dDat_w[2]),
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.io_uDatIn(uDat_w[2]),
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.io_uDatOut(uDat_w[1]),
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|
2025-05-14 16:26:20 +08:00
|
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.io_iqspi_sck(qspi_sck),
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.io_iqspi_mosi(qspi_mosi),
|
2025-05-17 12:20:07 +08:00
|
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.io_iqspi_miso(qspi_miso[4*2+3:4*2]),
|
2025-05-14 16:26:20 +08:00
|
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.io_iqspi_isDirIn(),
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.io_iqspi_csn(spi_csn[2]),
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|
2025-05-12 19:52:30 +08:00
|
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.io_ospi_sck (spi_sck),
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.io_ospi_mosi(spi_mosi),
|
2025-05-17 12:20:07 +08:00
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.io_ospi_miso(spi_miso[2]),
|
2025-05-14 16:26:20 +08:00
|
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.io_ospi_csn (spi_csn[7]),
|
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.io_oqspi_sck(qspi_sck),
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.io_oqspi_mosi(qspi_mosi),
|
2025-05-17 12:20:07 +08:00
|
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.io_oqspi_miso(qspi_miso[4*7+3:4*7]),
|
2025-05-14 16:26:20 +08:00
|
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.io_oqspi_isDirIn(),
|
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.io_oqspi_csn(spi_csn[12]),
|
2025-05-12 15:41:11 +08:00
|
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.io_rsp_valid(),
|
2025-05-21 16:04:39 +08:00
|
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.io_rsp_bits_isError(),
|
2025-05-23 17:22:59 +08:00
|
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|
.io_isSoftReset(isSoftReset[2]),
|
2025-06-03 17:07:08 +08:00
|
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|
.io_interrupt(io_int_sig[2])
|
2025-05-12 15:41:11 +08:00
|
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|
);
|
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ShinTop s_ShinTop_slv2(
|
|
|
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|
|
.clock(clock),
|
2025-05-21 16:04:39 +08:00
|
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|
|
.reset(reset | isSoftReset[3]),
|
2025-05-12 15:41:11 +08:00
|
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.io_clk8x(clk8x),
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.io_dDatIn(dDat_w[2]),
|
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.io_dDatOut(dDat_w[3]),
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.io_uDatIn(uDat_w[3]),
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.io_uDatOut(uDat_w[2]),
|
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|
2025-05-14 16:26:20 +08:00
|
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.io_iqspi_sck(qspi_sck),
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.io_iqspi_mosi(qspi_mosi),
|
2025-05-17 12:20:07 +08:00
|
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.io_iqspi_miso(qspi_miso[4*3+3:4*3]),
|
2025-05-14 16:26:20 +08:00
|
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|
.io_iqspi_isDirIn(),
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.io_iqspi_csn(spi_csn[3]),
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|
2025-05-12 19:52:30 +08:00
|
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.io_ospi_sck (spi_sck),
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.io_ospi_mosi(spi_mosi),
|
2025-05-17 12:20:07 +08:00
|
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.io_ospi_miso(spi_miso[3]),
|
2025-05-14 16:26:20 +08:00
|
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|
.io_ospi_csn (spi_csn[8]),
|
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|
|
.io_oqspi_sck(qspi_sck),
|
|
|
|
|
|
.io_oqspi_mosi(qspi_mosi),
|
2025-05-17 12:20:07 +08:00
|
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|
|
.io_oqspi_miso(qspi_miso[4*8+3:4*8]),
|
2025-05-14 16:26:20 +08:00
|
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|
|
.io_oqspi_isDirIn(),
|
|
|
|
|
|
.io_oqspi_csn(spi_csn[13]),
|
2025-05-12 15:41:11 +08:00
|
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|
.io_rsp_valid(),
|
2025-05-21 16:04:39 +08:00
|
|
|
|
.io_rsp_bits_isError(),
|
2025-05-23 17:22:59 +08:00
|
|
|
|
.io_isSoftReset(isSoftReset[3]),
|
2025-06-03 17:07:08 +08:00
|
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|
|
.io_interrupt(io_int_sig[3])
|
2025-05-12 15:41:11 +08:00
|
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|
|
);
|
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|
ShinTop s_ShinTop_slv3(
|
|
|
|
|
|
.clock(clock),
|
2025-05-21 16:04:39 +08:00
|
|
|
|
.reset(reset | isSoftReset[4]),
|
2025-05-12 15:41:11 +08:00
|
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|
|
|
|
|
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|
|
.io_clk8x(clk8x),
|
|
|
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|
|
.io_dDatIn(dDat_w[3]),
|
|
|
|
|
|
.io_dDatOut(),
|
|
|
|
|
|
.io_uDatIn(1'b0),
|
|
|
|
|
|
.io_uDatOut(uDat_w[3]),
|
|
|
|
|
|
|
2025-05-14 16:26:20 +08:00
|
|
|
|
.io_iqspi_sck(qspi_sck),
|
|
|
|
|
|
.io_iqspi_mosi(qspi_mosi),
|
2025-05-17 12:20:07 +08:00
|
|
|
|
.io_iqspi_miso(qspi_miso[4*4+3:4*4]),
|
2025-05-14 16:26:20 +08:00
|
|
|
|
.io_iqspi_isDirIn(),
|
|
|
|
|
|
.io_iqspi_csn(spi_csn[4]),
|
|
|
|
|
|
|
2025-05-12 19:52:30 +08:00
|
|
|
|
.io_ospi_sck (spi_sck),
|
|
|
|
|
|
.io_ospi_mosi(spi_mosi),
|
2025-05-17 12:20:07 +08:00
|
|
|
|
.io_ospi_miso(spi_miso[4]),
|
2025-05-14 16:26:20 +08:00
|
|
|
|
.io_ospi_csn (spi_csn[9]),
|
|
|
|
|
|
|
|
|
|
|
|
.io_oqspi_sck(qspi_sck),
|
|
|
|
|
|
.io_oqspi_mosi(qspi_mosi),
|
2025-05-17 12:20:07 +08:00
|
|
|
|
.io_oqspi_miso(qspi_miso[4*9+3:4*9]),
|
2025-05-14 16:26:20 +08:00
|
|
|
|
.io_oqspi_isDirIn(),
|
|
|
|
|
|
.io_oqspi_csn(spi_csn[14]),
|
2025-05-12 15:41:11 +08:00
|
|
|
|
|
|
|
|
|
|
.io_rsp_valid(),
|
2025-05-21 16:04:39 +08:00
|
|
|
|
.io_rsp_bits_isError(),
|
2025-05-23 17:22:59 +08:00
|
|
|
|
.io_isSoftReset(isSoftReset[4]),
|
2025-06-03 17:07:08 +08:00
|
|
|
|
.io_interrupt(io_int_sig[4])
|
2025-05-12 15:41:11 +08:00
|
|
|
|
);
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
initial begin
|
|
|
|
|
|
clock = 0;
|
|
|
|
|
|
clk8x = 0;
|
2025-06-25 15:25:53 +08:00
|
|
|
|
reset = 1;
|
2025-05-12 15:41:11 +08:00
|
|
|
|
|
2025-06-04 10:16:46 +08:00
|
|
|
|
_reset_deactive = 1'b0;
|
|
|
|
|
|
|
2025-06-04 10:56:59 +08:00
|
|
|
|
$timeformat(-9, 2, " ns", 8);
|
|
|
|
|
|
|
2025-05-14 16:26:20 +08:00
|
|
|
|
spi_csn = ~15'b0;
|
2025-05-12 15:41:11 +08:00
|
|
|
|
|
|
|
|
|
|
#100
|
|
|
|
|
|
reset <= 1;
|
|
|
|
|
|
|
|
|
|
|
|
#240
|
|
|
|
|
|
reset <= 0;
|
|
|
|
|
|
|
2025-05-23 15:45:20 +08:00
|
|
|
|
//#20000000
|
2025-06-05 19:37:41 +08:00
|
|
|
|
#1000000000
|
|
|
|
|
|
//#5000000
|
2025-05-23 15:45:20 +08:00
|
|
|
|
|
2025-05-12 15:41:11 +08:00
|
|
|
|
$display("Time Out !!!");
|
2025-05-16 18:07:22 +08:00
|
|
|
|
$fclose(spidata_file);
|
2025-05-12 15:41:11 +08:00
|
|
|
|
$stop;
|
|
|
|
|
|
end
|
|
|
|
|
|
|
|
|
|
|
|
initial begin
|
2025-05-13 17:05:38 +08:00
|
|
|
|
forever begin #20 clk8x <= ~clk8x; end
|
2025-05-12 15:41:11 +08:00
|
|
|
|
end
|
|
|
|
|
|
|
|
|
|
|
|
initial begin
|
|
|
|
|
|
forever begin #80 clock <= ~clock; end
|
|
|
|
|
|
end
|
|
|
|
|
|
|
|
|
|
|
|
initial
|
|
|
|
|
|
begin
|
2025-05-16 18:07:22 +08:00
|
|
|
|
spidata_file = $fopen("spi_trans_data.txt", "w");
|
|
|
|
|
|
if (!spidata_file) $display("文件打开失败");
|
2025-05-12 15:41:11 +08:00
|
|
|
|
$dumpfile("./tb/build/wave.vcd"); //生成的vcd文件名称
|
|
|
|
|
|
$dumpvars(0, ShinTopSpiTb);//tb模块名称
|
|
|
|
|
|
end
|
|
|
|
|
|
|
|
|
|
|
|
|
2025-06-04 10:16:46 +08:00
|
|
|
|
always @(posedge reset) begin
|
|
|
|
|
|
_reset_deactive <= 1'b0;
|
|
|
|
|
|
end
|
2025-05-12 15:41:11 +08:00
|
|
|
|
|
2025-06-04 10:16:46 +08:00
|
|
|
|
always @(negedge reset) begin
|
|
|
|
|
|
_reset_deactive <= 1'b1;
|
|
|
|
|
|
end
|
2025-05-12 15:41:11 +08:00
|
|
|
|
|
2025-05-12 19:52:30 +08:00
|
|
|
|
`define SCKFRE #640
|
2025-05-12 15:41:11 +08:00
|
|
|
|
|
2025-05-12 19:52:30 +08:00
|
|
|
|
reg sck = 0;
|
|
|
|
|
|
|
2025-05-12 15:41:11 +08:00
|
|
|
|
initial begin
|
|
|
|
|
|
forever begin
|
2025-05-12 19:52:30 +08:00
|
|
|
|
`SCKFRE sck <= ~sck;
|
|
|
|
|
|
end
|
2025-05-12 15:41:11 +08:00
|
|
|
|
end
|
|
|
|
|
|
|
2025-05-14 16:26:20 +08:00
|
|
|
|
assign spi_sck = sck;
|
|
|
|
|
|
assign qspi_sck = sck;
|
2025-05-12 15:41:11 +08:00
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
reg [7:0] txBuf[0:2047];
|
|
|
|
|
|
reg [7:0] rxBuf[0:2047];
|
2025-05-19 14:13:47 +08:00
|
|
|
|
reg [7:0] exChangeRego;
|
|
|
|
|
|
reg [7:0] exChangeRegi;
|
2025-05-14 16:26:20 +08:00
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
2025-05-19 14:13:47 +08:00
|
|
|
|
assign spi_mosi = exChangeRego[7];
|
|
|
|
|
|
assign qspi_mosi = exChangeRego[7:4];
|
|
|
|
|
|
|
2025-05-17 12:20:07 +08:00
|
|
|
|
wire [3:0] qspi_mux_miso =
|
|
|
|
|
|
( qspi_miso[4*0+3:4*0] & ~{4{spi_csn[ 0]}}) |
|
|
|
|
|
|
( qspi_miso[4*1+3:4*1] & ~{4{spi_csn[ 1]}}) |
|
|
|
|
|
|
( qspi_miso[4*2+3:4*2] & ~{4{spi_csn[ 2]}}) |
|
|
|
|
|
|
( qspi_miso[4*3+3:4*3] & ~{4{spi_csn[ 3]}}) |
|
|
|
|
|
|
( qspi_miso[4*4+3:4*4] & ~{4{spi_csn[ 4]}}) |
|
|
|
|
|
|
( qspi_miso[4*5+3:4*5] & ~{4{spi_csn[10]}}) |
|
|
|
|
|
|
( qspi_miso[4*6+3:4*6] & ~{4{spi_csn[11]}}) |
|
|
|
|
|
|
( qspi_miso[4*7+3:4*7] & ~{4{spi_csn[12]}}) |
|
|
|
|
|
|
( qspi_miso[4*8+3:4*8] & ~{4{spi_csn[13]}}) |
|
|
|
|
|
|
( qspi_miso[4*9+3:4*9] & ~{4{spi_csn[14]}});
|
|
|
|
|
|
|
|
|
|
|
|
wire spi_mux_miso =
|
|
|
|
|
|
( spi_miso[0] & ~spi_csn[5] ) |
|
|
|
|
|
|
( spi_miso[1] & ~spi_csn[6] ) |
|
|
|
|
|
|
( spi_miso[2] & ~spi_csn[7] ) |
|
|
|
|
|
|
( spi_miso[3] & ~spi_csn[8] ) |
|
|
|
|
|
|
( spi_miso[4] & ~spi_csn[9] );
|
2025-05-12 15:41:11 +08:00
|
|
|
|
|
2025-05-12 19:52:30 +08:00
|
|
|
|
reg isReq = 0;
|
|
|
|
|
|
reg isBusy = 0;
|
|
|
|
|
|
|
|
|
|
|
|
reg [11:0] length;
|
|
|
|
|
|
reg [7:0] idx;
|
2025-05-12 15:41:11 +08:00
|
|
|
|
|
2025-05-12 19:52:30 +08:00
|
|
|
|
reg [11:0] transCnt;
|
|
|
|
|
|
reg [11:0] byteCnt;
|
2025-05-13 10:31:35 +08:00
|
|
|
|
reg [2:0] bitCnt;
|
2025-05-12 15:41:11 +08:00
|
|
|
|
|
2025-05-12 19:52:30 +08:00
|
|
|
|
|
2025-05-13 10:31:35 +08:00
|
|
|
|
always @(posedge clock) begin
|
|
|
|
|
|
if( isReq & sck == 0 ) begin
|
2025-05-12 19:52:30 +08:00
|
|
|
|
isBusy <= #5 1'b1;
|
|
|
|
|
|
transCnt <= #5 0;
|
|
|
|
|
|
|
2025-05-14 16:26:20 +08:00
|
|
|
|
byteCnt <= #5 ~12'b0;
|
|
|
|
|
|
bitCnt <= #5 ~3'b0;
|
2025-05-12 19:52:30 +08:00
|
|
|
|
|
|
|
|
|
|
spi_csn[idx] <= #5 1'b0;
|
2025-05-19 14:13:47 +08:00
|
|
|
|
exChangeRego <= txBuf[0];
|
2025-05-12 19:52:30 +08:00
|
|
|
|
end
|
2025-05-13 10:31:35 +08:00
|
|
|
|
end
|
2025-05-12 19:52:30 +08:00
|
|
|
|
|
2025-05-13 10:31:35 +08:00
|
|
|
|
|
2025-05-14 16:26:20 +08:00
|
|
|
|
wire isQspi = (idx >= 0 && idx <= 4) || idx >= 10;
|
2025-05-16 18:07:22 +08:00
|
|
|
|
wire [11:0] nextByteCnt = byteCnt + 1;
|
2025-05-14 16:26:20 +08:00
|
|
|
|
|
2025-05-19 14:13:47 +08:00
|
|
|
|
//输出
|
|
|
|
|
|
always @(negedge sck) begin
|
|
|
|
|
|
if( isBusy ) begin
|
|
|
|
|
|
if( &bitCnt ) begin
|
2025-05-20 15:10:42 +08:00
|
|
|
|
exChangeRego <= txBuf[nextByteCnt];
|
2025-05-19 14:13:47 +08:00
|
|
|
|
end else begin
|
2025-05-20 15:10:42 +08:00
|
|
|
|
exChangeRego <= isQspi ? exChangeRego << 4 : exChangeRego << 1;
|
2025-05-19 14:13:47 +08:00
|
|
|
|
end
|
|
|
|
|
|
end
|
|
|
|
|
|
end
|
|
|
|
|
|
|
|
|
|
|
|
//输入
|
2025-05-13 10:31:35 +08:00
|
|
|
|
always @(posedge sck) begin
|
2025-05-12 19:52:30 +08:00
|
|
|
|
if( isBusy ) begin
|
2025-05-14 16:26:20 +08:00
|
|
|
|
if( transCnt <= length ) begin
|
|
|
|
|
|
if( isQspi ) begin
|
|
|
|
|
|
bitCnt <= ~bitCnt;
|
|
|
|
|
|
end else begin
|
|
|
|
|
|
bitCnt <= bitCnt + 1;
|
|
|
|
|
|
end
|
2025-05-13 10:31:35 +08:00
|
|
|
|
|
2025-05-14 16:26:20 +08:00
|
|
|
|
if( &bitCnt ) begin
|
2025-05-12 19:52:30 +08:00
|
|
|
|
byteCnt <= byteCnt +1;
|
2025-05-13 10:31:35 +08:00
|
|
|
|
transCnt <= transCnt + 1;
|
2025-05-17 12:20:07 +08:00
|
|
|
|
if( txBuf[2] === 1 & nextByteCnt >= 4) begin
|
2025-05-19 15:04:15 +08:00
|
|
|
|
rxBuf[byteCnt] <= exChangeRegi;
|
2025-05-26 14:20:22 +08:00
|
|
|
|
//$display("spi read out %x", exChangeRegi);
|
2025-05-17 12:20:07 +08:00
|
|
|
|
end
|
|
|
|
|
|
if( txBuf[2] === 1 & nextByteCnt >= 3) begin
|
2025-05-19 14:13:47 +08:00
|
|
|
|
exChangeRegi <= isQspi ? {exChangeRegi[3:0], qspi_mux_miso} : {exChangeRegi[6:0], spi_mux_miso};
|
2025-05-17 12:20:07 +08:00
|
|
|
|
end else begin
|
2025-05-19 14:13:47 +08:00
|
|
|
|
exChangeRegi <= 0;
|
2025-05-17 12:20:07 +08:00
|
|
|
|
end
|
2025-05-12 19:52:30 +08:00
|
|
|
|
end else begin
|
2025-05-20 17:21:02 +08:00
|
|
|
|
exChangeRegi <= isQspi ? {exChangeRegi[3:0], qspi_mux_miso} : {exChangeRegi[6:0], spi_mux_miso};
|
2025-05-12 15:41:11 +08:00
|
|
|
|
end
|
2025-05-12 19:52:30 +08:00
|
|
|
|
end else begin
|
|
|
|
|
|
isBusy <= #5 1'b0;
|
|
|
|
|
|
spi_csn[idx] <= #5 1'b1;
|
2025-05-12 15:41:11 +08:00
|
|
|
|
end
|
2025-05-12 19:52:30 +08:00
|
|
|
|
end
|
|
|
|
|
|
end
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
2025-05-16 18:07:22 +08:00
|
|
|
|
//mst slv0~slv3的 内部qspi调用即设置
|
|
|
|
|
|
//sidx为0~4;外部spi为5~9,外部qspi为10~15
|
2025-05-12 19:52:30 +08:00
|
|
|
|
task spi_trans( input [15:0] saddress, input [7:0] scmd, input [12:0] slength,input [7:0] sidx );
|
|
|
|
|
|
begin
|
2025-05-28 16:41:32 +08:00
|
|
|
|
txBuf[0] <= saddress[15:8];
|
|
|
|
|
|
txBuf[1] <= saddress[7:0];
|
2025-05-12 19:52:30 +08:00
|
|
|
|
txBuf[2] <= scmd;
|
|
|
|
|
|
|
2025-05-13 10:31:35 +08:00
|
|
|
|
length <= slength + 3;
|
2025-05-12 19:52:30 +08:00
|
|
|
|
idx <= sidx;
|
|
|
|
|
|
|
|
|
|
|
|
#5
|
|
|
|
|
|
@(negedge sck)
|
|
|
|
|
|
isReq <= 1;
|
|
|
|
|
|
@(posedge sck) #5
|
|
|
|
|
|
isReq <= 0;
|
|
|
|
|
|
|
2025-05-13 10:31:35 +08:00
|
|
|
|
@( negedge isBusy) #1000
|
2025-05-16 18:07:22 +08:00
|
|
|
|
begin
|
2025-06-04 10:56:59 +08:00
|
|
|
|
//$fwrite(spidata_file, "------------%5t------------\n", $realtime);
|
|
|
|
|
|
$fwrite(spidata_file, "T:%t \tdev:%4d, addr:0x%02h%02h, %s, len:%4d\n",
|
|
|
|
|
|
$realtime, ((sidx >= 5)? ((sidx >= 10)? (sidx - 10):(sidx - 5)):sidx), txBuf[0], txBuf[1],
|
2025-05-16 19:50:24 +08:00
|
|
|
|
((txBuf[2] == 0)? "Write":" Read"), slength);
|
2025-05-19 08:32:05 +08:00
|
|
|
|
|
2025-06-25 10:48:37 +08:00
|
|
|
|
if ( ((saddress == 16'h0800)
|
2025-05-23 12:56:24 +08:00
|
|
|
|
|| (saddress == 16'h1000)
|
|
|
|
|
|
|| (saddress == 16'h1800)
|
|
|
|
|
|
|| (saddress == 16'h2000)
|
|
|
|
|
|
|| (saddress == 16'h2800)
|
|
|
|
|
|
|| (saddress == 16'h3000)
|
|
|
|
|
|
|| (saddress == 16'h3800)
|
|
|
|
|
|
|| (saddress == 16'h4000))
|
|
|
|
|
|
&& ((sidx == 0) || (sidx == 5) || (sidx == 10))) begin
|
|
|
|
|
|
_pos = 3;
|
|
|
|
|
|
for (integer _k = 0; _k < 4; _k++) begin
|
|
|
|
|
|
if (scmd == 0) begin
|
|
|
|
|
|
$fwrite(spidata_file, "%02h ", txBuf[_k + _pos]);
|
|
|
|
|
|
end else begin
|
|
|
|
|
|
$fwrite(spidata_file, "%02h ", rxBuf[_k + _pos]);
|
|
|
|
|
|
end
|
2025-05-19 08:32:05 +08:00
|
|
|
|
end
|
2025-05-23 12:56:24 +08:00
|
|
|
|
|
|
|
|
|
|
$fwrite(spidata_file, "\n");
|
|
|
|
|
|
_pos = 4 + _pos;
|
|
|
|
|
|
for (; _pos < slength; ) begin
|
2025-06-25 10:48:37 +08:00
|
|
|
|
for (integer _k = 0; _k < 6; _k++) begin
|
2025-05-23 12:56:24 +08:00
|
|
|
|
if (scmd == 0) begin
|
|
|
|
|
|
$fwrite(spidata_file, "%02h ", txBuf[_k + _pos]);
|
|
|
|
|
|
_len = txBuf[_pos + 5] + (txBuf[_pos + 4] & 8'h0f) * 256;
|
|
|
|
|
|
end else begin
|
|
|
|
|
|
$fwrite(spidata_file, "%02h ", rxBuf[_k + _pos]);
|
|
|
|
|
|
_len = rxBuf[_pos + 5] + (rxBuf[_pos + 4] & 8'h0f) * 256;
|
|
|
|
|
|
end
|
|
|
|
|
|
end
|
2025-06-26 16:37:12 +08:00
|
|
|
|
|
|
|
|
|
|
begin:PRINT_PKT_COMMENT
|
|
|
|
|
|
integer dev;
|
|
|
|
|
|
integer addr_type;
|
|
|
|
|
|
integer addr;
|
|
|
|
|
|
integer cmd;
|
|
|
|
|
|
integer len;
|
|
|
|
|
|
|
|
|
|
|
|
if (scmd == 0) begin
|
|
|
|
|
|
addr_type = txBuf[_pos + 1] & 8'h3;
|
|
|
|
|
|
dev = txBuf[_pos] * 256 + ((txBuf[_pos + 1] >> 2) & 8'hff);
|
|
|
|
|
|
addr = txBuf[_pos + 2] * 256 + (txBuf[_pos + 3] & 8'hff);
|
|
|
|
|
|
cmd = (txBuf[_pos + 4] >> 4) & 8'h0f;
|
|
|
|
|
|
len = (txBuf[_pos + 4] & 8'h0f) * 256 + (txBuf[_pos + 5] & 8'hff);
|
|
|
|
|
|
end else begin
|
|
|
|
|
|
addr_type = rxBuf[_pos + 1] & 8'h3;
|
|
|
|
|
|
dev = rxBuf[_pos] * 256 + ((rxBuf[_pos + 1] >> 2) & 8'hff);
|
|
|
|
|
|
addr = rxBuf[_pos + 2] * 256 + (rxBuf[_pos + 3] & 8'hff);
|
|
|
|
|
|
cmd = (rxBuf[_pos + 4] >> 4) & 8'h0f;
|
|
|
|
|
|
len = (rxBuf[_pos + 4] & 8'h0f) * 256 + (rxBuf[_pos + 5] & 8'hff);
|
|
|
|
|
|
end
|
|
|
|
|
|
|
|
|
|
|
|
if (addr_type == 0)
|
|
|
|
|
|
$fwrite(spidata_file, "// type:%3d dev:%3d addr:0x%04x cmd:0x%1x len:%3d", addr_type, dev, addr[15:0], cmd[3:0], len);
|
|
|
|
|
|
else begin
|
|
|
|
|
|
addr = dev * 65536 + addr;
|
|
|
|
|
|
$fwrite(spidata_file, "// type:%3d addr:0x08x cmd:0x%1x len:%3d", addr_type, addr, cmd[3:0], len);
|
|
|
|
|
|
end
|
|
|
|
|
|
end
|
2025-05-23 12:56:24 +08:00
|
|
|
|
|
|
|
|
|
|
$fwrite(spidata_file, "\n{{ ");
|
2025-06-25 10:48:37 +08:00
|
|
|
|
_pos = _pos + 6;
|
2025-05-23 12:56:24 +08:00
|
|
|
|
for (integer _k = 0; _k < _len; _k++) begin
|
|
|
|
|
|
if (scmd == 0) begin
|
|
|
|
|
|
$fwrite(spidata_file, "%02h ", txBuf[_k + _pos]);
|
|
|
|
|
|
end else begin
|
|
|
|
|
|
$fwrite(spidata_file, "%02h ", rxBuf[_k + _pos]);
|
|
|
|
|
|
end
|
|
|
|
|
|
c_line = 0;
|
|
|
|
|
|
if ((_k + 2)%16 == 0) begin
|
|
|
|
|
|
$fwrite(spidata_file, "\n");
|
|
|
|
|
|
c_line = 1;
|
|
|
|
|
|
end
|
|
|
|
|
|
end
|
|
|
|
|
|
$fwrite(spidata_file, "}}\n");
|
|
|
|
|
|
_pos = _pos + _len;
|
2025-06-25 10:48:37 +08:00
|
|
|
|
|
|
|
|
|
|
for (integer _k = 0; _k < 2; _k++) begin
|
|
|
|
|
|
if (scmd == 0) begin
|
|
|
|
|
|
$fwrite(spidata_file, "%02h ", txBuf[_k + _pos]);
|
|
|
|
|
|
end else begin
|
|
|
|
|
|
$fwrite(spidata_file, "%02h ", rxBuf[_k + _pos]);
|
|
|
|
|
|
end
|
|
|
|
|
|
end
|
|
|
|
|
|
_pos = _pos + 2;
|
|
|
|
|
|
$fwrite(spidata_file, "\n");
|
2025-05-23 12:56:24 +08:00
|
|
|
|
end
|
|
|
|
|
|
end else begin
|
|
|
|
|
|
for (integer i=0; i<slength; i++) begin
|
|
|
|
|
|
if (scmd == 0) begin
|
|
|
|
|
|
$fwrite(spidata_file, "%02h ", txBuf[i + 3]);
|
|
|
|
|
|
end else begin
|
|
|
|
|
|
$fwrite(spidata_file, "%02h ", rxBuf[i + 3]);
|
|
|
|
|
|
end
|
|
|
|
|
|
c_line = 0;
|
|
|
|
|
|
if ((i+1)%16 == 0) begin
|
|
|
|
|
|
$fwrite(spidata_file, "\n");
|
|
|
|
|
|
c_line = 1;
|
|
|
|
|
|
end
|
|
|
|
|
|
end
|
|
|
|
|
|
|
|
|
|
|
|
if (c_line == 0) begin
|
2025-05-19 08:32:05 +08:00
|
|
|
|
$fwrite(spidata_file, "\n");
|
2025-05-16 18:07:22 +08:00
|
|
|
|
end
|
2025-05-23 12:56:24 +08:00
|
|
|
|
c_line = 0;
|
2025-05-16 18:07:22 +08:00
|
|
|
|
end
|
|
|
|
|
|
end
|
2025-05-12 15:41:11 +08:00
|
|
|
|
end
|
2025-05-12 19:52:30 +08:00
|
|
|
|
|
2025-05-12 15:41:11 +08:00
|
|
|
|
endtask
|
|
|
|
|
|
|
2025-06-04 10:56:59 +08:00
|
|
|
|
always @(posedge _reset_deactive) begin
|
2025-06-04 11:08:45 +08:00
|
|
|
|
if (io_int_sig[0]) $fdisplay(spidata_file, "**MST INT SETUP: %t", $realtime);
|
|
|
|
|
|
if (io_int_sig[1]) $fdisplay(spidata_file, "**SLV0 INT SETUP: %t", $realtime);
|
|
|
|
|
|
if (io_int_sig[2]) $fdisplay(spidata_file, "**SLV1 INT SETUP: %t", $realtime);
|
|
|
|
|
|
if (io_int_sig[3]) $fdisplay(spidata_file, "**SLV2 INT SETUP: %t", $realtime);
|
|
|
|
|
|
if (io_int_sig[4]) $fdisplay(spidata_file, "**SLV3 INT SETUP: %t", $realtime);
|
2025-06-04 10:56:59 +08:00
|
|
|
|
end
|
|
|
|
|
|
|
2025-06-04 09:50:36 +08:00
|
|
|
|
always @(posedge io_int_sig[0]) begin
|
2025-06-04 10:16:46 +08:00
|
|
|
|
if (_reset_deactive == 1'b1)
|
2025-06-04 11:08:45 +08:00
|
|
|
|
$fdisplay(spidata_file, "**MST INT SETUP: %t", $realtime);
|
2025-06-04 09:50:36 +08:00
|
|
|
|
end
|
|
|
|
|
|
|
|
|
|
|
|
always @(posedge io_int_sig[1]) begin
|
2025-06-04 10:16:46 +08:00
|
|
|
|
if (_reset_deactive == 1'b1)
|
2025-06-04 11:08:45 +08:00
|
|
|
|
$fdisplay(spidata_file, "**SLV0 INT SETUP: %t", $realtime);
|
2025-06-04 09:50:36 +08:00
|
|
|
|
end
|
|
|
|
|
|
|
|
|
|
|
|
always @(posedge io_int_sig[2]) begin
|
2025-06-04 10:16:46 +08:00
|
|
|
|
if (_reset_deactive == 1'b1)
|
2025-06-04 11:08:45 +08:00
|
|
|
|
$fdisplay(spidata_file, "**SLV1 INT SETUP: %t", $realtime);
|
2025-06-04 09:50:36 +08:00
|
|
|
|
end
|
|
|
|
|
|
|
|
|
|
|
|
always @(posedge io_int_sig[3]) begin
|
2025-06-04 10:16:46 +08:00
|
|
|
|
if (_reset_deactive == 1'b1)
|
2025-06-04 11:08:45 +08:00
|
|
|
|
$fdisplay(spidata_file, "**SLV2 INT SETUP: %t", $realtime);
|
2025-06-04 09:50:36 +08:00
|
|
|
|
end
|
|
|
|
|
|
|
|
|
|
|
|
always @(posedge io_int_sig[4]) begin
|
2025-06-04 10:16:46 +08:00
|
|
|
|
if (_reset_deactive == 1'b1)
|
2025-06-04 11:08:45 +08:00
|
|
|
|
$fdisplay(spidata_file, "**SLV3 INT SETUP: %t", $realtime);
|
2025-06-04 09:50:36 +08:00
|
|
|
|
end
|
|
|
|
|
|
|
|
|
|
|
|
always @(negedge io_int_sig[0]) begin
|
2025-06-04 10:16:46 +08:00
|
|
|
|
if (_reset_deactive == 1'b1)
|
2025-06-04 11:08:45 +08:00
|
|
|
|
$fdisplay(spidata_file, "**MST INT CLEAR: %t", $realtime);
|
2025-06-04 09:50:36 +08:00
|
|
|
|
end
|
|
|
|
|
|
|
|
|
|
|
|
always @(negedge io_int_sig[1]) begin
|
2025-06-04 10:16:46 +08:00
|
|
|
|
if (_reset_deactive == 1'b1)
|
2025-06-04 11:08:45 +08:00
|
|
|
|
$fdisplay(spidata_file, "**SLV0 INT CLEAR: %t", $realtime);
|
2025-06-04 09:50:36 +08:00
|
|
|
|
end
|
|
|
|
|
|
|
|
|
|
|
|
always @(negedge io_int_sig[2]) begin
|
2025-06-04 10:16:46 +08:00
|
|
|
|
if (_reset_deactive == 1'b1)
|
2025-06-04 11:08:45 +08:00
|
|
|
|
$fdisplay(spidata_file, "**SLV1 INT CLEAR: %t", $realtime);
|
2025-06-04 09:50:36 +08:00
|
|
|
|
end
|
|
|
|
|
|
|
|
|
|
|
|
always @(negedge io_int_sig[3]) begin
|
2025-06-04 10:16:46 +08:00
|
|
|
|
if (_reset_deactive == 1'b1)
|
2025-06-04 11:08:45 +08:00
|
|
|
|
$fdisplay(spidata_file, "**SLV2 INT CLEAR: %t", $realtime);
|
2025-06-04 09:50:36 +08:00
|
|
|
|
end
|
|
|
|
|
|
|
|
|
|
|
|
always @(negedge io_int_sig[4]) begin
|
2025-06-04 10:16:46 +08:00
|
|
|
|
if (_reset_deactive == 1'b1)
|
2025-06-04 11:08:45 +08:00
|
|
|
|
$fdisplay(spidata_file, "**SLV3 INT CLEAR: %t", $realtime);
|
2025-06-04 09:50:36 +08:00
|
|
|
|
end
|
|
|
|
|
|
|
|
|
|
|
|
|
2025-05-12 19:52:30 +08:00
|
|
|
|
|
2025-05-16 18:07:22 +08:00
|
|
|
|
`define INTERFACE_IDX 0 //internal spi
|
|
|
|
|
|
`define IF_IDX(idx) ((`INTERFACE_IDX)+(idx))
|
2025-05-17 12:22:32 +08:00
|
|
|
|
`define IF_IQSPI(idx) ((idx))
|
|
|
|
|
|
`define IF_OQSPI(idx) ((10) + (idx))
|
|
|
|
|
|
`define IF_OSPI(idx) ((5) + (idx))
|
2025-05-16 18:07:22 +08:00
|
|
|
|
`define SPI_WRITE 8'h0
|
|
|
|
|
|
`define SPI_READ 8'h1
|
2025-05-22 15:32:55 +08:00
|
|
|
|
|
2025-05-26 20:01:23 +08:00
|
|
|
|
`define MST_TX_TRIGGER(idx) (8'h1 + ((idx & 8'h3) * 8'h2) + ((idx & 8'h3) * 8'h8))
|
2025-05-22 15:32:55 +08:00
|
|
|
|
`define MST_RX0_ADDR 16'h0800
|
|
|
|
|
|
`define MST_TX0_ADDR 16'h1000
|
|
|
|
|
|
`define MST_RX1_ADDR 16'h1800
|
|
|
|
|
|
`define MST_TX1_ADDR 16'h2000
|
|
|
|
|
|
`define MST_RX2_ADDR 16'h2800
|
|
|
|
|
|
`define MST_TX2_ADDR 16'h3000
|
|
|
|
|
|
`define MST_RX3_ADDR 16'h3800
|
|
|
|
|
|
`define MST_TX3_ADDR 16'h4000
|
|
|
|
|
|
`define MST_RX0_LEN_ADDR 16'h0306
|
|
|
|
|
|
`define MST_TX0_LEN_ADDR 16'h0302
|
|
|
|
|
|
`define MST_RX1_LEN_ADDR 16'h030e
|
|
|
|
|
|
`define MST_TX1_LEN_ADDR 16'h030a
|
|
|
|
|
|
`define MST_RX2_LEN_ADDR 16'h0316
|
|
|
|
|
|
`define MST_TX2_LEN_ADDR 16'h0312
|
|
|
|
|
|
`define MST_RX3_LEN_ADDR 16'h031e
|
|
|
|
|
|
`define MST_TX3_LEN_ADDR 16'h031a
|
|
|
|
|
|
|
|
|
|
|
|
`define MST_TX_TRG (`MST_TX_TRIGGER(0))
|
|
|
|
|
|
`define MST_RX_ADDR (`MST_RX0_ADDR)
|
|
|
|
|
|
`define MST_TX_ADDR (`MST_TX0_ADDR)
|
|
|
|
|
|
`define MST_RX_LEN_ADDR (`MST_RX0_LEN_ADDR)
|
|
|
|
|
|
`define MST_TX_LEN_ADDR (`MST_TX0_LEN_ADDR)
|
|
|
|
|
|
|
2025-05-12 15:41:11 +08:00
|
|
|
|
initial begin
|
|
|
|
|
|
|
|
|
|
|
|
#1000
|
2025-05-21 10:48:04 +08:00
|
|
|
|
|
2025-05-23 14:36:23 +08:00
|
|
|
|
`ifdef ENABLE_REG_RW_TEST
|
2025-05-21 10:48:04 +08:00
|
|
|
|
/*---------------------------------------------------------------------------------------------------------
|
|
|
|
|
|
测试用例
|
|
|
|
|
|
1. 从IP中读取寄存器,上电后的寄存器期望值为0
|
|
|
|
|
|
---------------------------------------------------------------------------------------------------------*/
|
2025-05-27 12:49:55 +08:00
|
|
|
|
begin:READ_REG_TESTCASE
|
2025-06-04 10:56:59 +08:00
|
|
|
|
_t_start = $realtime;
|
2025-05-27 12:49:55 +08:00
|
|
|
|
$fdisplay(spidata_file, "测试用例:从IP中读取寄存器,上电后的寄存器期望值为0");
|
|
|
|
|
|
spi_trans( (16'h00), (`SPI_READ), (64), (`IF_IQSPI(0)) );
|
|
|
|
|
|
spi_trans( (16'h00), (`SPI_READ), (64), (`IF_IQSPI(1)) );
|
|
|
|
|
|
spi_trans( (16'h00), (`SPI_READ), (64), (`IF_IQSPI(2)) );
|
|
|
|
|
|
spi_trans( (16'h00), (`SPI_READ), (64), (`IF_IQSPI(3)) );
|
|
|
|
|
|
spi_trans( (16'h00), (`SPI_READ), (64), (`IF_IQSPI(4)) );
|
2025-06-04 10:56:59 +08:00
|
|
|
|
_t_end = $realtime;
|
|
|
|
|
|
$fdisplay(spidata_file, "该测试用例运行时间:%t\n", _t_end - _t_start);
|
2025-05-27 12:49:55 +08:00
|
|
|
|
end
|
2025-05-21 10:48:04 +08:00
|
|
|
|
`endif
|
2025-05-17 12:22:32 +08:00
|
|
|
|
|
2025-05-27 12:49:55 +08:00
|
|
|
|
begin:SETTING_INTERFACE
|
|
|
|
|
|
if ((`INTERFACE_IDX) == 5) begin
|
|
|
|
|
|
$fdisplay(spidata_file, "\n\n从内部QSPI配置使用外部的SPI接口访问EasyBus");
|
|
|
|
|
|
txBuf[0+3] = 8'h01;
|
|
|
|
|
|
spi_trans( (16'h09), (`SPI_WRITE), (1), (`IF_IQSPI(0)) );
|
|
|
|
|
|
spi_trans( (16'h09), (`SPI_WRITE), (1), (`IF_IQSPI(1)) );
|
|
|
|
|
|
spi_trans( (16'h09), (`SPI_WRITE), (1), (`IF_IQSPI(2)) );
|
|
|
|
|
|
spi_trans( (16'h09), (`SPI_WRITE), (1), (`IF_IQSPI(3)) );
|
|
|
|
|
|
spi_trans( (16'h09), (`SPI_WRITE), (1), (`IF_IQSPI(4)) );
|
|
|
|
|
|
end else if ((`INTERFACE_IDX) == 10) begin
|
|
|
|
|
|
$fdisplay(spidata_file, "\n\n从内部QSPI配置使用外部的QSPI接口访问EasyBus");
|
|
|
|
|
|
txBuf[0+3] = 8'h02;
|
|
|
|
|
|
spi_trans( (16'h09), (`SPI_WRITE), (1), (`IF_IQSPI(0)) );
|
|
|
|
|
|
spi_trans( (16'h09), (`SPI_WRITE), (1), (`IF_IQSPI(1)) );
|
|
|
|
|
|
spi_trans( (16'h09), (`SPI_WRITE), (1), (`IF_IQSPI(2)) );
|
|
|
|
|
|
spi_trans( (16'h09), (`SPI_WRITE), (1), (`IF_IQSPI(3)) );
|
|
|
|
|
|
spi_trans( (16'h09), (`SPI_WRITE), (1), (`IF_IQSPI(4)) );
|
|
|
|
|
|
end else begin
|
|
|
|
|
|
$fdisplay(spidata_file, "\n\n从内部QSPI接口访问EasyBus");
|
|
|
|
|
|
end
|
2025-05-17 12:22:32 +08:00
|
|
|
|
end
|
2025-05-16 18:07:22 +08:00
|
|
|
|
|
|
|
|
|
|
|
2025-05-20 15:12:07 +08:00
|
|
|
|
/*---------------------------------------------------------------------------------------------------------
|
2025-05-21 10:48:04 +08:00
|
|
|
|
测试用例
|
|
|
|
|
|
1. 设置IP为主站或从站,并读取设置结果,期望:0主,1~4从
|
2025-05-20 15:12:07 +08:00
|
|
|
|
---------------------------------------------------------------------------------------------------------*/
|
2025-05-27 12:49:55 +08:00
|
|
|
|
begin:SETTING_DEV_ROLE
|
|
|
|
|
|
//设置主站从站
|
|
|
|
|
|
$fdisplay(spidata_file, "\n\n测试用例:设置IP为主站或从站,并读取设置结果,期望:0主,1~4从");
|
|
|
|
|
|
txBuf[0+3] = 8'h01;
|
|
|
|
|
|
spi_trans( (16'h00), (`SPI_WRITE), (1), (`IF_IDX(0)) );
|
2025-05-16 18:07:22 +08:00
|
|
|
|
|
2025-05-27 12:49:55 +08:00
|
|
|
|
#1000
|
|
|
|
|
|
txBuf[0+3] = 8'h02;
|
|
|
|
|
|
spi_trans( (16'h0), (`SPI_WRITE), (1), (`IF_IDX(1)) );
|
|
|
|
|
|
|
|
|
|
|
|
#1000
|
|
|
|
|
|
spi_trans( (16'h0), (`SPI_WRITE), (1), (`IF_IDX(2)) );
|
|
|
|
|
|
|
|
|
|
|
|
#1000
|
|
|
|
|
|
spi_trans( (16'h0), (`SPI_WRITE), (1), (`IF_IDX(3)) );
|
|
|
|
|
|
|
|
|
|
|
|
#1000
|
|
|
|
|
|
spi_trans( (16'h0), (`SPI_WRITE), (1), (`IF_IDX(4)) );
|
|
|
|
|
|
|
2025-06-04 10:56:59 +08:00
|
|
|
|
$fdisplay(spidata_file, "-设置完毕,检查接口寄存器");
|
2025-05-27 12:49:55 +08:00
|
|
|
|
spi_trans( (16'h00), (`SPI_READ), (1), (`IF_IDX(0)) );
|
|
|
|
|
|
spi_trans( (16'h00), (`SPI_READ), (1), (`IF_IDX(1)) );
|
|
|
|
|
|
spi_trans( (16'h00), (`SPI_READ), (1), (`IF_IDX(2)) );
|
|
|
|
|
|
spi_trans( (16'h00), (`SPI_READ), (1), (`IF_IDX(3)) );
|
|
|
|
|
|
spi_trans( (16'h00), (`SPI_READ), (1), (`IF_IDX(4)) );
|
|
|
|
|
|
end
|
2025-05-12 15:41:11 +08:00
|
|
|
|
|
2025-06-04 09:50:36 +08:00
|
|
|
|
`ifdef ENABLE_INT_INIT_TEST
|
2025-06-03 15:54:14 +08:00
|
|
|
|
begin:CHECK_INTERRUPT_SIG
|
|
|
|
|
|
$fdisplay(spidata_file, "\n\n测试用例:检查设备的INTERRUPT信号");
|
|
|
|
|
|
|
2025-06-03 17:07:08 +08:00
|
|
|
|
@(posedge clock) begin
|
2025-06-04 11:08:45 +08:00
|
|
|
|
if (io_int_sig[0]) $fdisplay(spidata_file, "**MST Interrupt.");
|
|
|
|
|
|
if (io_int_sig[1]) $fdisplay(spidata_file, "**SLV0 Interrupt.");
|
|
|
|
|
|
if (io_int_sig[2]) $fdisplay(spidata_file, "**SLV1 Interrupt.");
|
|
|
|
|
|
if (io_int_sig[3]) $fdisplay(spidata_file, "**SLV2 Interrupt.");
|
|
|
|
|
|
if (io_int_sig[4]) $fdisplay(spidata_file, "**SLV3 Interrupt.");
|
2025-06-03 17:07:08 +08:00
|
|
|
|
end
|
|
|
|
|
|
|
2025-06-04 10:56:59 +08:00
|
|
|
|
$fdisplay(spidata_file, "-检查中断");
|
2025-06-03 15:54:14 +08:00
|
|
|
|
spi_trans( (16'h70), (`SPI_READ), (14), (`IF_IDX(0)) );
|
|
|
|
|
|
spi_trans( (16'h70), (`SPI_READ), (14), (`IF_IDX(1)) );
|
|
|
|
|
|
spi_trans( (16'h70), (`SPI_READ), (14), (`IF_IDX(2)) );
|
|
|
|
|
|
spi_trans( (16'h70), (`SPI_READ), (14), (`IF_IDX(3)) );
|
|
|
|
|
|
spi_trans( (16'h70), (`SPI_READ), (14), (`IF_IDX(4)) );
|
|
|
|
|
|
|
2025-06-04 10:56:59 +08:00
|
|
|
|
$fdisplay(spidata_file, "-清中断");
|
2025-06-03 15:54:14 +08:00
|
|
|
|
txBuf[0+3] = 8'h00;
|
|
|
|
|
|
txBuf[1+3] = 8'h00;
|
|
|
|
|
|
txBuf[2+3] = 8'h00;
|
|
|
|
|
|
txBuf[3+3] = 8'h80;
|
|
|
|
|
|
spi_trans( (16'h78), (`SPI_WRITE), (4), (`IF_IDX(0)) );
|
|
|
|
|
|
spi_trans( (16'h78), (`SPI_WRITE), (4), (`IF_IDX(1)) );
|
|
|
|
|
|
spi_trans( (16'h78), (`SPI_WRITE), (4), (`IF_IDX(2)) );
|
|
|
|
|
|
spi_trans( (16'h78), (`SPI_WRITE), (4), (`IF_IDX(3)) );
|
|
|
|
|
|
spi_trans( (16'h78), (`SPI_WRITE), (4), (`IF_IDX(4)) );
|
|
|
|
|
|
|
2025-06-04 10:56:59 +08:00
|
|
|
|
$fdisplay(spidata_file, "-检查中断");
|
2025-06-03 15:54:14 +08:00
|
|
|
|
spi_trans( (16'h70), (`SPI_READ), (14), (`IF_IDX(0)) );
|
|
|
|
|
|
spi_trans( (16'h70), (`SPI_READ), (14), (`IF_IDX(1)) );
|
|
|
|
|
|
spi_trans( (16'h70), (`SPI_READ), (14), (`IF_IDX(2)) );
|
|
|
|
|
|
spi_trans( (16'h70), (`SPI_READ), (14), (`IF_IDX(3)) );
|
|
|
|
|
|
spi_trans( (16'h70), (`SPI_READ), (14), (`IF_IDX(4)) );
|
|
|
|
|
|
end
|
|
|
|
|
|
|
2025-06-03 16:25:13 +08:00
|
|
|
|
begin:CHECK_INTERRUPT_CFG_REG
|
|
|
|
|
|
$fdisplay(spidata_file, "\n\n测试用例:检查设备的INTERRUPT信号设置寄存器");
|
|
|
|
|
|
|
2025-06-04 10:56:59 +08:00
|
|
|
|
$fdisplay(spidata_file, "-检查中断");
|
2025-06-03 16:25:13 +08:00
|
|
|
|
spi_trans( (16'h70), (`SPI_READ), (4), (`IF_IDX(0)) );
|
|
|
|
|
|
spi_trans( (16'h70), (`SPI_READ), (4), (`IF_IDX(1)) );
|
|
|
|
|
|
spi_trans( (16'h70), (`SPI_READ), (4), (`IF_IDX(2)) );
|
|
|
|
|
|
spi_trans( (16'h70), (`SPI_READ), (4), (`IF_IDX(3)) );
|
|
|
|
|
|
spi_trans( (16'h70), (`SPI_READ), (4), (`IF_IDX(4)) );
|
|
|
|
|
|
|
2025-06-04 10:56:59 +08:00
|
|
|
|
$fdisplay(spidata_file, "-设置中断");
|
2025-06-03 16:25:13 +08:00
|
|
|
|
txBuf[0+3] = 8'h00;
|
|
|
|
|
|
txBuf[1+3] = 8'h00;
|
|
|
|
|
|
txBuf[2+3] = 8'h00;
|
|
|
|
|
|
txBuf[3+3] = 8'h00;
|
|
|
|
|
|
spi_trans( (16'h70), (`SPI_WRITE), (4), (`IF_IDX(0)) );
|
|
|
|
|
|
spi_trans( (16'h70), (`SPI_WRITE), (4), (`IF_IDX(1)) );
|
|
|
|
|
|
spi_trans( (16'h70), (`SPI_WRITE), (4), (`IF_IDX(2)) );
|
|
|
|
|
|
spi_trans( (16'h70), (`SPI_WRITE), (4), (`IF_IDX(3)) );
|
|
|
|
|
|
spi_trans( (16'h70), (`SPI_WRITE), (4), (`IF_IDX(4)) );
|
|
|
|
|
|
|
2025-06-04 10:56:59 +08:00
|
|
|
|
$fdisplay(spidata_file, "-检查中断");
|
2025-06-03 16:25:13 +08:00
|
|
|
|
spi_trans( (16'h70), (`SPI_READ), (4), (`IF_IDX(0)) );
|
|
|
|
|
|
spi_trans( (16'h70), (`SPI_READ), (4), (`IF_IDX(1)) );
|
|
|
|
|
|
spi_trans( (16'h70), (`SPI_READ), (4), (`IF_IDX(2)) );
|
|
|
|
|
|
spi_trans( (16'h70), (`SPI_READ), (4), (`IF_IDX(3)) );
|
|
|
|
|
|
spi_trans( (16'h70), (`SPI_READ), (4), (`IF_IDX(4)) );
|
|
|
|
|
|
|
2025-06-04 10:56:59 +08:00
|
|
|
|
$fdisplay(spidata_file, "-设置中断");
|
2025-06-03 16:25:13 +08:00
|
|
|
|
txBuf[0+3] = 8'h0F;
|
|
|
|
|
|
txBuf[1+3] = 8'h00;
|
|
|
|
|
|
txBuf[2+3] = 8'h00;
|
|
|
|
|
|
txBuf[3+3] = 8'h00;
|
|
|
|
|
|
spi_trans( (16'h70), (`SPI_WRITE), (4), (`IF_IDX(0)) );
|
|
|
|
|
|
spi_trans( (16'h70), (`SPI_WRITE), (4), (`IF_IDX(1)) );
|
|
|
|
|
|
spi_trans( (16'h70), (`SPI_WRITE), (4), (`IF_IDX(2)) );
|
|
|
|
|
|
spi_trans( (16'h70), (`SPI_WRITE), (4), (`IF_IDX(3)) );
|
|
|
|
|
|
spi_trans( (16'h70), (`SPI_WRITE), (4), (`IF_IDX(4)) );
|
|
|
|
|
|
|
2025-06-04 10:56:59 +08:00
|
|
|
|
$fdisplay(spidata_file, "-检查中断");
|
2025-06-03 16:25:13 +08:00
|
|
|
|
spi_trans( (16'h70), (`SPI_READ), (4), (`IF_IDX(0)) );
|
|
|
|
|
|
spi_trans( (16'h70), (`SPI_READ), (4), (`IF_IDX(1)) );
|
|
|
|
|
|
spi_trans( (16'h70), (`SPI_READ), (4), (`IF_IDX(2)) );
|
|
|
|
|
|
spi_trans( (16'h70), (`SPI_READ), (4), (`IF_IDX(3)) );
|
|
|
|
|
|
spi_trans( (16'h70), (`SPI_READ), (4), (`IF_IDX(4)) );
|
|
|
|
|
|
end
|
2025-06-04 09:50:36 +08:00
|
|
|
|
`endif
|
2025-06-03 16:25:13 +08:00
|
|
|
|
|
2025-05-23 14:36:23 +08:00
|
|
|
|
`ifdef ENABLE_DET_TEST
|
2025-05-20 15:12:07 +08:00
|
|
|
|
/*---------------------------------------------------------------------------------------------------------
|
|
|
|
|
|
测试用例3
|
|
|
|
|
|
---------------------------------------------------------------------------------------------------------*/
|
2025-05-12 15:41:11 +08:00
|
|
|
|
//嗅探
|
2025-05-27 12:49:55 +08:00
|
|
|
|
begin:DETECT_DEV_TESTCASE
|
2025-06-04 10:56:59 +08:00
|
|
|
|
_t_start = $realtime;
|
2025-05-27 12:49:55 +08:00
|
|
|
|
#1000
|
|
|
|
|
|
$fdisplay(spidata_file, "\n\n测试用例:发送嗅探包,需要在波形文件里检查");
|
|
|
|
|
|
|
2025-06-04 10:56:59 +08:00
|
|
|
|
$fdisplay(spidata_file, "-嗅探前,检查链路状态寄存器");
|
2025-05-16 19:50:24 +08:00
|
|
|
|
//spi_trans( (16'h00c0), (`SPI_READ), (6), (`IF_IDX(0)) );
|
2025-05-28 19:12:11 +08:00
|
|
|
|
spi_trans( (16'h00c0), (`SPI_READ), (4), (`IF_IDX(1)) );
|
|
|
|
|
|
spi_trans( (16'h00c0), (`SPI_READ), (4), (`IF_IDX(2)) );
|
|
|
|
|
|
spi_trans( (16'h00c0), (`SPI_READ), (4), (`IF_IDX(3)) );
|
|
|
|
|
|
spi_trans( (16'h00c0), (`SPI_READ), (4), (`IF_IDX(4)) );
|
2025-05-16 18:07:22 +08:00
|
|
|
|
|
2025-06-04 10:56:59 +08:00
|
|
|
|
$fdisplay(spidata_file, "-嗅探");
|
2025-05-21 15:56:35 +08:00
|
|
|
|
|
|
|
|
|
|
`include "detect_pkt.vh"
|
2025-05-28 09:02:30 +08:00
|
|
|
|
|
2025-05-27 12:49:55 +08:00
|
|
|
|
// 顺序索引
|
|
|
|
|
|
//#50000
|
|
|
|
|
|
#1000
|
2025-06-04 10:56:59 +08:00
|
|
|
|
$fdisplay(spidata_file, "-嗅探后,检查链路状态寄存器");
|
2025-05-27 12:49:55 +08:00
|
|
|
|
//spi_trans( (16'h00c0), (`SPI_READ), (6), (`IF_IDX(0)) );
|
2025-05-28 19:12:11 +08:00
|
|
|
|
spi_trans( (16'h00c0), (`SPI_READ), (4), (`IF_IDX(1)) );
|
|
|
|
|
|
spi_trans( (16'h00c0), (`SPI_READ), (4), (`IF_IDX(2)) );
|
|
|
|
|
|
spi_trans( (16'h00c0), (`SPI_READ), (4), (`IF_IDX(3)) );
|
|
|
|
|
|
spi_trans( (16'h00c0), (`SPI_READ), (4), (`IF_IDX(4)) );
|
2025-06-04 10:56:59 +08:00
|
|
|
|
_t_end = $realtime;
|
|
|
|
|
|
$fdisplay(spidata_file, "该测试用例运行时间:%t\n", _t_end - _t_start);
|
2025-05-12 15:41:11 +08:00
|
|
|
|
end
|
2025-05-23 18:48:21 +08:00
|
|
|
|
`endif
|
2025-05-16 18:07:22 +08:00
|
|
|
|
|
2025-05-23 14:36:23 +08:00
|
|
|
|
`ifdef ENABLE_SET_ADDR_TEST
|
2025-05-20 15:12:07 +08:00
|
|
|
|
/*---------------------------------------------------------------------------------------------------------
|
2025-05-21 10:48:04 +08:00
|
|
|
|
测试用例
|
2025-05-20 15:12:07 +08:00
|
|
|
|
---------------------------------------------------------------------------------------------------------*/
|
2025-05-27 12:49:55 +08:00
|
|
|
|
begin:SET_ADDR_TESTCASE
|
2025-06-04 10:56:59 +08:00
|
|
|
|
_t_start = $realtime;
|
2025-05-27 12:49:55 +08:00
|
|
|
|
$fdisplay(spidata_file, "\n\n测试用例:设置顺序索引");
|
|
|
|
|
|
$display("index @ %d", s_ShinTop_Mst.interface__io_cReg_timeStamp);
|
2025-05-12 15:41:11 +08:00
|
|
|
|
|
2025-06-04 10:56:59 +08:00
|
|
|
|
$fdisplay(spidata_file, "-设置顺序地址前,检查顺序地址");
|
2025-05-16 18:07:22 +08:00
|
|
|
|
//spi_trans( (16'h0010), (`SPI_READ), (5), (`IF_IDX(0)) );
|
2025-05-17 12:22:32 +08:00
|
|
|
|
spi_trans( (16'h0000), (`SPI_READ), (16), (`IF_IDX(1)) );
|
|
|
|
|
|
spi_trans( (16'h0000), (`SPI_READ), (16), (`IF_IDX(2)) );
|
|
|
|
|
|
spi_trans( (16'h0000), (`SPI_READ), (16), (`IF_IDX(3)) );
|
|
|
|
|
|
spi_trans( (16'h0000), (`SPI_READ), (16), (`IF_IDX(4)) );
|
2025-05-12 15:41:11 +08:00
|
|
|
|
|
2025-06-04 10:56:59 +08:00
|
|
|
|
$fdisplay(spidata_file, "-设置顺序地址");
|
2025-05-21 16:21:29 +08:00
|
|
|
|
`include "set_addr_pkt.vh"
|
2025-05-28 13:56:39 +08:00
|
|
|
|
|
2025-05-27 12:49:55 +08:00
|
|
|
|
//测试
|
|
|
|
|
|
spi_trans( (16'hc0), (`SPI_READ), (6), (`IF_IDX(3)) );
|
|
|
|
|
|
spi_trans( (16'h0a), (`SPI_READ), (2), (`IF_IDX(1)) );
|
|
|
|
|
|
spi_trans( (16'h0a), (`SPI_READ), (2), (`IF_IDX(2)) );
|
|
|
|
|
|
spi_trans( (16'h0a), (`SPI_READ), (2), (`IF_IDX(3)) );
|
|
|
|
|
|
spi_trans( (16'h0a), (`SPI_READ), (2), (`IF_IDX(4)) );
|
|
|
|
|
|
|
|
|
|
|
|
//读写
|
|
|
|
|
|
#1000
|
2025-06-04 10:56:59 +08:00
|
|
|
|
$fdisplay(spidata_file, "-设置顺序地址后,检查顺序地址");
|
2025-05-27 12:49:55 +08:00
|
|
|
|
spi_trans( (16'h0000), (`SPI_READ), (16), (`IF_IDX(1)) );
|
|
|
|
|
|
spi_trans( (16'h0000), (`SPI_READ), (16), (`IF_IDX(2)) );
|
|
|
|
|
|
spi_trans( (16'h0000), (`SPI_READ), (16), (`IF_IDX(3)) );
|
|
|
|
|
|
spi_trans( (16'h0000), (`SPI_READ), (16), (`IF_IDX(4)) );
|
2025-05-17 12:20:07 +08:00
|
|
|
|
|
2025-06-04 10:56:59 +08:00
|
|
|
|
_t_end = $realtime;
|
|
|
|
|
|
$fdisplay(spidata_file, "该测试用例运行时间:%t\n", _t_end - _t_start);
|
2025-05-27 12:49:55 +08:00
|
|
|
|
end
|
2025-05-23 14:36:23 +08:00
|
|
|
|
`endif
|
2025-05-16 18:07:22 +08:00
|
|
|
|
|
2025-05-23 14:36:23 +08:00
|
|
|
|
`ifdef ENABLE_DET_TEST
|
2025-05-20 16:03:20 +08:00
|
|
|
|
/*---------------------------------------------------------------------------------------------------------
|
2025-05-21 10:48:04 +08:00
|
|
|
|
测试用例
|
2025-05-20 16:03:20 +08:00
|
|
|
|
---------------------------------------------------------------------------------------------------------*/
|
2025-05-27 12:49:55 +08:00
|
|
|
|
begin:DETECT_DEV_TESTCASE_2
|
|
|
|
|
|
//嗅探
|
2025-06-04 10:56:59 +08:00
|
|
|
|
_t_start = $realtime;
|
2025-05-27 12:49:55 +08:00
|
|
|
|
#1000
|
|
|
|
|
|
$fdisplay(spidata_file, "\n\n测试用例:发送嗅探包,需要在波形文件里检查");
|
|
|
|
|
|
|
2025-05-22 15:32:55 +08:00
|
|
|
|
$fdisplay(spidata_file, "嗅探:使用SM0");
|
2025-06-04 10:56:59 +08:00
|
|
|
|
$fdisplay(spidata_file, "-嗅探前,检查链路状态寄存器");
|
2025-05-20 11:48:49 +08:00
|
|
|
|
//spi_trans( (16'h00c0), (`SPI_READ), (6), (`IF_IDX(0)) );
|
2025-05-28 19:12:11 +08:00
|
|
|
|
spi_trans( (16'h00c0), (`SPI_READ), (4), (`IF_IDX(1)) );
|
|
|
|
|
|
spi_trans( (16'h00c0), (`SPI_READ), (4), (`IF_IDX(2)) );
|
|
|
|
|
|
spi_trans( (16'h00c0), (`SPI_READ), (4), (`IF_IDX(3)) );
|
|
|
|
|
|
spi_trans( (16'h00c0), (`SPI_READ), (4), (`IF_IDX(4)) );
|
2025-05-20 11:48:49 +08:00
|
|
|
|
|
2025-06-04 10:56:59 +08:00
|
|
|
|
$fdisplay(spidata_file, "-嗅探");
|
2025-05-20 11:48:49 +08:00
|
|
|
|
//设置SM1在写入0x3地址触发enq
|
2025-05-23 12:56:24 +08:00
|
|
|
|
|
2025-05-28 09:02:30 +08:00
|
|
|
|
`include "detect_pkt.vh"
|
2025-05-22 15:32:55 +08:00
|
|
|
|
|
2025-06-04 10:56:59 +08:00
|
|
|
|
$fdisplay(spidata_file, "-嗅探后,检查链路状态寄存器");
|
2025-05-27 12:49:55 +08:00
|
|
|
|
//spi_trans( (16'h00c0), (`SPI_READ), (6), (`IF_IDX(0)) );
|
2025-05-28 19:12:11 +08:00
|
|
|
|
spi_trans( (16'h00c0), (`SPI_READ), (4), (`IF_IDX(1)) );
|
|
|
|
|
|
spi_trans( (16'h00c0), (`SPI_READ), (4), (`IF_IDX(2)) );
|
|
|
|
|
|
spi_trans( (16'h00c0), (`SPI_READ), (4), (`IF_IDX(3)) );
|
|
|
|
|
|
spi_trans( (16'h00c0), (`SPI_READ), (4), (`IF_IDX(4)) );
|
2025-06-04 10:56:59 +08:00
|
|
|
|
_t_end = $realtime;
|
|
|
|
|
|
$fdisplay(spidata_file, "该测试用例运行时间:%t\n", _t_end - _t_start);
|
2025-05-27 12:49:55 +08:00
|
|
|
|
end
|
2025-05-23 14:36:23 +08:00
|
|
|
|
`endif
|
2025-05-22 15:32:55 +08:00
|
|
|
|
|
|
|
|
|
|
|
2025-05-23 14:36:23 +08:00
|
|
|
|
`ifdef ENABLE_SM1_SEND_TEST
|
2025-05-27 12:49:55 +08:00
|
|
|
|
begin:SM1_SEND_TESTCASE
|
2025-06-04 10:56:59 +08:00
|
|
|
|
_t_start = $realtime;
|
2025-05-26 20:01:23 +08:00
|
|
|
|
$fdisplay(spidata_file, "\n单读:使用SM1");
|
2025-06-04 10:56:59 +08:00
|
|
|
|
$fdisplay(spidata_file, "-SM1:数据包");
|
2025-05-26 20:01:23 +08:00
|
|
|
|
|
|
|
|
|
|
`include "sm1_pkt.vh"
|
2025-05-20 11:48:49 +08:00
|
|
|
|
|
2025-06-04 10:56:59 +08:00
|
|
|
|
_t_end = $realtime;
|
|
|
|
|
|
$fdisplay(spidata_file, "该测试用例运行时间:%t\n", _t_end - _t_start);
|
2025-05-20 11:48:49 +08:00
|
|
|
|
end
|
2025-05-27 12:49:55 +08:00
|
|
|
|
|
2025-05-22 15:32:55 +08:00
|
|
|
|
`endif
|
2025-05-20 17:39:44 +08:00
|
|
|
|
|
2025-05-23 18:48:21 +08:00
|
|
|
|
`ifdef ENABLE_SMx_SEND_TEST
|
2025-05-27 12:49:55 +08:00
|
|
|
|
|
|
|
|
|
|
begin:SM2_SEND_TESTCASE
|
|
|
|
|
|
|
2025-06-04 10:56:59 +08:00
|
|
|
|
_t_start = $realtime;
|
2025-05-27 12:49:55 +08:00
|
|
|
|
#1000
|
|
|
|
|
|
$display("read&write @ %d", s_ShinTop_Mst.interface__io_cReg_timeStamp);
|
|
|
|
|
|
|
2025-05-26 20:01:23 +08:00
|
|
|
|
$fdisplay(spidata_file, "\n广播读:使用SM2");
|
2025-06-04 10:56:59 +08:00
|
|
|
|
$fdisplay(spidata_file, "-广播读");
|
2025-05-26 20:01:23 +08:00
|
|
|
|
|
|
|
|
|
|
`include "sm2_pkt.vh"
|
|
|
|
|
|
|
2025-06-04 10:56:59 +08:00
|
|
|
|
_t_end = $realtime;
|
|
|
|
|
|
$fdisplay(spidata_file, "该测试用例运行时间:%t\n", _t_end - _t_start);
|
2025-05-26 20:01:23 +08:00
|
|
|
|
end
|
|
|
|
|
|
|
2025-05-27 12:49:55 +08:00
|
|
|
|
|
|
|
|
|
|
begin:SM3_SEND_TESTCASE
|
2025-06-04 10:56:59 +08:00
|
|
|
|
_t_start = $realtime;
|
2025-05-27 12:49:55 +08:00
|
|
|
|
#1000
|
|
|
|
|
|
$display("read&write @ %d", s_ShinTop_Mst.interface__io_cReg_timeStamp);
|
2025-05-23 18:48:21 +08:00
|
|
|
|
$fdisplay(spidata_file, "\n广播写:使用SM3");
|
2025-06-04 10:56:59 +08:00
|
|
|
|
$fdisplay(spidata_file, "-SM3广播写");
|
2025-05-23 18:48:21 +08:00
|
|
|
|
|
|
|
|
|
|
`include "sm3_pkt.vh"
|
|
|
|
|
|
|
2025-05-27 12:49:55 +08:00
|
|
|
|
spi_trans( (16'h0800), (`SPI_READ), (16), (`IF_IDX(1)) );
|
|
|
|
|
|
spi_trans( (16'h0800), (`SPI_READ), (16), (`IF_IDX(2)) );
|
|
|
|
|
|
spi_trans( (16'h0800), (`SPI_READ), (16), (`IF_IDX(3)) );
|
|
|
|
|
|
spi_trans( (16'h0800), (`SPI_READ), (16), (`IF_IDX(4)) );
|
2025-05-23 18:48:21 +08:00
|
|
|
|
|
2025-06-04 10:56:59 +08:00
|
|
|
|
_t_end = $realtime;
|
|
|
|
|
|
$fdisplay(spidata_file, "该测试用例运行时间:%t\n", _t_end - _t_start);
|
2025-05-27 12:49:55 +08:00
|
|
|
|
end
|
|
|
|
|
|
|
2025-05-23 18:48:21 +08:00
|
|
|
|
`endif
|
2025-05-23 14:36:23 +08:00
|
|
|
|
|
2025-05-20 16:03:20 +08:00
|
|
|
|
/*---------------------------------------------------------------------------------------------------------
|
2025-05-21 10:48:04 +08:00
|
|
|
|
测试用例
|
|
|
|
|
|
1. 交换数据sm0~sm7
|
|
|
|
|
|
2. 交换数据sm0~sm7
|
|
|
|
|
|
3. 交换数据sm0~sm7(中断、状态)
|
|
|
|
|
|
4. 交换数据sm0~sm7(R/W/RW, BR/BW/BRW)
|
|
|
|
|
|
4. 寄存器单读/写/读写,寄存器广播读/写/读写
|
|
|
|
|
|
5. 以上交换数据的错误形式
|
2025-05-27 12:49:55 +08:00
|
|
|
|
---------------------------------------------------------------------------------------------------------*/
|
2025-05-30 16:06:38 +08:00
|
|
|
|
`ifdef ENABLE_EXCHG_DATA_SEQ0_TEST
|
2025-05-27 12:49:55 +08:00
|
|
|
|
begin:EXCHG_DATA_SEQ0_TESTCASE
|
2025-06-04 10:56:59 +08:00
|
|
|
|
_t_start = $realtime;
|
2025-05-27 12:49:55 +08:00
|
|
|
|
#1000
|
2025-05-30 19:02:15 +08:00
|
|
|
|
$fdisplay(spidata_file, "\n\n测试用例:交换数据sm0~sm7");
|
2025-05-27 12:49:55 +08:00
|
|
|
|
$display("read&write @ %d", s_ShinTop_Mst.interface__io_cReg_timeStamp);
|
2025-05-21 15:56:35 +08:00
|
|
|
|
|
|
|
|
|
|
`include "seq_0_pkt.vh"
|
2025-05-12 15:41:11 +08:00
|
|
|
|
|
2025-06-04 10:56:59 +08:00
|
|
|
|
_t_end = $realtime;
|
|
|
|
|
|
$fdisplay(spidata_file, "该测试用例运行时间:%t\n", _t_end - _t_start);
|
2025-05-12 15:41:11 +08:00
|
|
|
|
end
|
2025-05-30 16:06:38 +08:00
|
|
|
|
`endif
|
2025-05-12 15:41:11 +08:00
|
|
|
|
|
2025-05-30 16:06:38 +08:00
|
|
|
|
`ifdef ENABLE_EXCHG_DATA_SEQ1_TEST
|
2025-05-27 12:49:55 +08:00
|
|
|
|
begin:EXCHG_DATA_SEQ1_TESTCASE
|
2025-06-04 10:56:59 +08:00
|
|
|
|
_t_start = $realtime;
|
2025-05-27 12:49:55 +08:00
|
|
|
|
#1000
|
2025-05-30 19:02:15 +08:00
|
|
|
|
$fdisplay(spidata_file, "\n\n测试用例:交换数据写dev2_sm0/dev1_sm2/dev3_sm4/dev4_sm6");
|
2025-05-27 12:49:55 +08:00
|
|
|
|
$display("read&write @ %d", s_ShinTop_Mst.interface__io_cReg_timeStamp);
|
2025-05-30 19:02:15 +08:00
|
|
|
|
|
2025-05-21 15:56:35 +08:00
|
|
|
|
`include "seq_1_pkt.vh"
|
|
|
|
|
|
|
2025-06-26 09:34:43 +08:00
|
|
|
|
spi_trans( (16'h1800), (`SPI_READ), (64), (`IF_IDX(1)) );
|
2025-06-09 14:03:50 +08:00
|
|
|
|
$fdisplay(spidata_file, "-嗅探前,检查链路状态寄存器");
|
|
|
|
|
|
//spi_trans( (16'h00c0), (`SPI_READ), (6), (`IF_IDX(0)) );
|
|
|
|
|
|
spi_trans( (16'h00c0), (`SPI_READ), (4), (`IF_IDX(1)) );
|
|
|
|
|
|
spi_trans( (16'h00c0), (`SPI_READ), (4), (`IF_IDX(2)) );
|
|
|
|
|
|
spi_trans( (16'h00c0), (`SPI_READ), (4), (`IF_IDX(3)) );
|
|
|
|
|
|
spi_trans( (16'h00c0), (`SPI_READ), (4), (`IF_IDX(4)) );
|
|
|
|
|
|
|
|
|
|
|
|
$fdisplay(spidata_file, "-嗅探");
|
|
|
|
|
|
//设置SM1在写入0x3地址触发enq
|
|
|
|
|
|
|
|
|
|
|
|
`include "detect_pkt.vh"
|
|
|
|
|
|
|
|
|
|
|
|
$fdisplay(spidata_file, "-嗅探后,检查链路状态寄存器");
|
2025-06-26 09:34:43 +08:00
|
|
|
|
//spi_trans( (16'h00c0), (`SPI_READ), (6), (`IF_IDX(0)) );
|
2025-06-09 14:03:50 +08:00
|
|
|
|
spi_trans( (16'h00c0), (`SPI_READ), (4), (`IF_IDX(1)) );
|
|
|
|
|
|
spi_trans( (16'h00c0), (`SPI_READ), (4), (`IF_IDX(2)) );
|
|
|
|
|
|
spi_trans( (16'h00c0), (`SPI_READ), (4), (`IF_IDX(3)) );
|
2025-06-26 09:34:43 +08:00
|
|
|
|
spi_trans( (16'h00c0), (`SPI_READ), (4), (`IF_IDX(4)) );
|
2025-05-27 12:49:55 +08:00
|
|
|
|
spi_trans( (16'h0800), (`SPI_READ), (64), (`IF_IDX(2)) );
|
|
|
|
|
|
spi_trans( (16'h2800), (`SPI_READ), (64), (`IF_IDX(3)) );
|
|
|
|
|
|
spi_trans( (16'h3800), (`SPI_READ), (64), (`IF_IDX(4)) );
|
|
|
|
|
|
|
2025-06-04 10:56:59 +08:00
|
|
|
|
_t_end = $realtime;
|
|
|
|
|
|
$fdisplay(spidata_file, "该测试用例运行时间:%t\n", _t_end - _t_start);
|
2025-05-27 12:49:55 +08:00
|
|
|
|
end
|
2025-05-30 16:06:38 +08:00
|
|
|
|
`endif
|
2025-05-21 10:48:04 +08:00
|
|
|
|
|
2025-05-30 16:06:38 +08:00
|
|
|
|
`ifdef ENABLE_EXCHG_DATA_SEQ2_TEST
|
2025-05-27 12:49:55 +08:00
|
|
|
|
begin:EXCHG_DATA_SEQ2_TESTCASE
|
2025-06-04 10:56:59 +08:00
|
|
|
|
_t_start = $realtime;
|
2025-05-27 12:49:55 +08:00
|
|
|
|
#1000
|
2025-05-30 19:02:15 +08:00
|
|
|
|
$fdisplay(spidata_file, "\n\n测试用例:交换数据读dev1_sm1/dev2_sm3/dev3_sm5/dev4_sm7");
|
2025-05-27 12:49:55 +08:00
|
|
|
|
$display("read&write @ %d", s_ShinTop_Mst.interface__io_cReg_timeStamp);
|
2025-05-22 23:47:20 +08:00
|
|
|
|
|
|
|
|
|
|
`include "seq_2_pkt.vh"
|
|
|
|
|
|
|
2025-06-04 10:56:59 +08:00
|
|
|
|
_t_end = $realtime;
|
|
|
|
|
|
$fdisplay(spidata_file, "该测试用例运行时间:%t\n", _t_end - _t_start);
|
2025-05-27 12:49:55 +08:00
|
|
|
|
end
|
2025-05-23 14:36:23 +08:00
|
|
|
|
`endif
|
2025-05-22 23:47:20 +08:00
|
|
|
|
|
2025-05-30 16:59:02 +08:00
|
|
|
|
`ifdef ENABLE_EXCHG_DATA_SEQ3_TEST
|
|
|
|
|
|
begin:EXCHG_DATA_SEQ3_TESTCASE
|
2025-06-04 10:56:59 +08:00
|
|
|
|
_t_start = $realtime;
|
2025-05-30 16:59:02 +08:00
|
|
|
|
#1000
|
2025-05-30 19:02:15 +08:00
|
|
|
|
$fdisplay(spidata_file, "\n\n测试用例:交换数据读写");
|
2025-05-30 16:59:02 +08:00
|
|
|
|
$display("read&write @ %d", s_ShinTop_Mst.interface__io_cReg_timeStamp);
|
|
|
|
|
|
|
|
|
|
|
|
`include "seq_3_pkt.vh"
|
|
|
|
|
|
|
2025-06-04 10:56:59 +08:00
|
|
|
|
_t_end = $realtime;
|
|
|
|
|
|
$fdisplay(spidata_file, "该测试用例运行时间:%t\n", _t_end - _t_start);
|
2025-05-30 16:59:02 +08:00
|
|
|
|
end
|
|
|
|
|
|
`endif
|
|
|
|
|
|
|
2025-05-30 16:06:38 +08:00
|
|
|
|
`ifdef ENABLE_BC_R_TEST
|
2025-05-27 12:49:55 +08:00
|
|
|
|
|
|
|
|
|
|
begin:EXCHG_DATA_BC_R_TESTCASE
|
2025-06-04 10:56:59 +08:00
|
|
|
|
_t_start = $realtime;
|
2025-05-27 12:49:55 +08:00
|
|
|
|
#1000
|
2025-05-30 19:17:37 +08:00
|
|
|
|
$fdisplay(spidata_file, "\n\n测试用例:广播读");
|
2025-05-27 12:49:55 +08:00
|
|
|
|
$display("read&write @ %d", s_ShinTop_Mst.interface__io_cReg_timeStamp);
|
2025-05-28 13:56:39 +08:00
|
|
|
|
|
2025-05-22 17:32:07 +08:00
|
|
|
|
`include "bc_r_pkt.vh"
|
2025-05-28 13:56:39 +08:00
|
|
|
|
|
2025-06-04 10:56:59 +08:00
|
|
|
|
_t_end = $realtime;
|
|
|
|
|
|
$fdisplay(spidata_file, "该测试用例运行时间:%t\n", _t_end - _t_start);
|
2025-05-22 17:32:07 +08:00
|
|
|
|
end
|
2025-05-30 16:06:38 +08:00
|
|
|
|
`endif
|
2025-05-12 15:41:11 +08:00
|
|
|
|
|
2025-05-30 16:06:38 +08:00
|
|
|
|
`ifdef ENABLE_BC_W_TEST
|
2025-05-27 12:49:55 +08:00
|
|
|
|
begin:EXCHG_DATA_BC_W_TESTCASE
|
2025-06-04 10:56:59 +08:00
|
|
|
|
_t_start = $realtime;
|
2025-05-27 12:49:55 +08:00
|
|
|
|
#1000
|
|
|
|
|
|
$display("read&write @ %d", s_ShinTop_Mst.interface__io_cReg_timeStamp);
|
|
|
|
|
|
|
2025-05-30 19:17:37 +08:00
|
|
|
|
$fdisplay(spidata_file, "\n\n测试用例:广播写");
|
2025-05-23 09:16:56 +08:00
|
|
|
|
`include "bc_w_pkt.vh"
|
|
|
|
|
|
|
2025-05-27 12:49:55 +08:00
|
|
|
|
spi_trans( (16'h0800), (`SPI_READ), (32), (`IF_IDX(1)) );
|
|
|
|
|
|
spi_trans( (16'h0800), (`SPI_READ), (32), (`IF_IDX(2)) );
|
|
|
|
|
|
spi_trans( (16'h0800), (`SPI_READ), (32), (`IF_IDX(3)) );
|
|
|
|
|
|
spi_trans( (16'h0800), (`SPI_READ), (32), (`IF_IDX(4)) );
|
|
|
|
|
|
|
2025-06-04 10:56:59 +08:00
|
|
|
|
_t_end = $realtime;
|
|
|
|
|
|
$fdisplay(spidata_file, "该测试用例运行时间:%t\n", _t_end - _t_start);
|
2025-05-23 09:16:56 +08:00
|
|
|
|
end
|
2025-05-23 14:36:23 +08:00
|
|
|
|
`endif
|
|
|
|
|
|
|
2025-05-30 16:06:38 +08:00
|
|
|
|
`ifdef ENABLE_BC_RW_TEST
|
|
|
|
|
|
begin:EXCHG_DATA_BC_RW_TESTCASE
|
2025-06-04 10:56:59 +08:00
|
|
|
|
_t_start = $realtime;
|
2025-05-30 16:06:38 +08:00
|
|
|
|
#1000
|
2025-05-30 19:17:37 +08:00
|
|
|
|
$fdisplay(spidata_file, "\n\n测试用例:广播读写");
|
2025-05-30 16:06:38 +08:00
|
|
|
|
$display("read&write @ %d", s_ShinTop_Mst.interface__io_cReg_timeStamp);
|
|
|
|
|
|
|
|
|
|
|
|
`include "bc_rw_pkt.vh"
|
|
|
|
|
|
|
|
|
|
|
|
spi_trans( (16'h0180), (`SPI_READ), (128), (`IF_IDX(1)) );
|
|
|
|
|
|
|
2025-06-04 10:56:59 +08:00
|
|
|
|
_t_end = $realtime;
|
|
|
|
|
|
$fdisplay(spidata_file, "该测试用例运行时间:%t\n", _t_end - _t_start);
|
2025-05-30 16:06:38 +08:00
|
|
|
|
end
|
|
|
|
|
|
`endif
|
|
|
|
|
|
|
2025-05-23 09:16:56 +08:00
|
|
|
|
|
2025-05-23 14:36:23 +08:00
|
|
|
|
`ifdef ENABLE_SYNC_TEST
|
2025-05-20 16:03:20 +08:00
|
|
|
|
/*---------------------------------------------------------------------------------------------------------
|
2025-05-21 10:48:04 +08:00
|
|
|
|
测试用例
|
|
|
|
|
|
1. 测试 同步(sync) 和 同步输出 (sync_out)
|
2025-05-20 16:03:20 +08:00
|
|
|
|
---------------------------------------------------------------------------------------------------------*/
|
2025-05-12 15:41:11 +08:00
|
|
|
|
// 同步
|
|
|
|
|
|
|
2025-05-28 10:34:26 +08:00
|
|
|
|
begin:SYNC_TESTCASE0
|
2025-06-04 10:56:59 +08:00
|
|
|
|
_t_start = $realtime;
|
2025-05-27 13:01:08 +08:00
|
|
|
|
#1000
|
|
|
|
|
|
|
|
|
|
|
|
$display("sync @ %d", s_ShinTop_Mst.interface__io_cReg_timeStamp);
|
|
|
|
|
|
$fdisplay(spidata_file, "\n\n测试用例:测试同步(sync)和同步输出(sync_out)");
|
|
|
|
|
|
|
2025-05-20 11:32:03 +08:00
|
|
|
|
//设置SM1在写入 0x18 len触发enq
|
2025-05-21 15:56:35 +08:00
|
|
|
|
`include "sync_pkt.vh"
|
2025-05-16 16:05:38 +08:00
|
|
|
|
|
2025-06-04 10:56:59 +08:00
|
|
|
|
_t_end = $realtime;
|
|
|
|
|
|
$fdisplay(spidata_file, "该测试用例运行时间:%t\n", _t_end - _t_start);
|
2025-05-28 10:34:26 +08:00
|
|
|
|
end
|
|
|
|
|
|
`endif
|
2025-05-16 16:05:38 +08:00
|
|
|
|
|
2025-05-28 10:34:26 +08:00
|
|
|
|
`ifdef ENABLE_SYNC_SIG0_TEST
|
|
|
|
|
|
begin:SYNC_TESTCASE1
|
2025-06-04 10:56:59 +08:00
|
|
|
|
_t_start = $realtime;
|
2025-05-28 10:34:26 +08:00
|
|
|
|
#1000
|
2025-05-30 19:02:15 +08:00
|
|
|
|
$fdisplay(spidata_file, "\n\n测试用例:测试同步信号(电平)");
|
|
|
|
|
|
|
2025-05-28 10:34:26 +08:00
|
|
|
|
`include "sync_sig_pkt.vh"
|
2025-05-21 13:26:20 +08:00
|
|
|
|
|
2025-05-27 12:49:55 +08:00
|
|
|
|
//spi_trans( (16'h0100), (`SPI_READ), (32), (`IF_IDX(0)) );
|
|
|
|
|
|
spi_trans( (16'h0100), (`SPI_READ), (16'h48), (`IF_IDX(1)) );
|
|
|
|
|
|
spi_trans( (16'h0100), (`SPI_READ), (16'h48), (`IF_IDX(2)) );
|
|
|
|
|
|
spi_trans( (16'h0100), (`SPI_READ), (16'h48), (`IF_IDX(3)) );
|
|
|
|
|
|
spi_trans( (16'h0100), (`SPI_READ), (16'h48), (`IF_IDX(4)) );
|
|
|
|
|
|
|
2025-05-28 10:34:26 +08:00
|
|
|
|
|
|
|
|
|
|
#100000
|
2025-05-27 12:49:55 +08:00
|
|
|
|
//清脉冲
|
|
|
|
|
|
txBuf[0+3] = 0; //负载0x122 sync0脉冲宽度
|
|
|
|
|
|
txBuf[1+3] = 0; //负载0x123
|
|
|
|
|
|
txBuf[2+3] = 0; //负载0x124 sync1脉冲宽度
|
|
|
|
|
|
txBuf[3+3] = 0; //负载0x125
|
|
|
|
|
|
txBuf[4+3] = 0; //负载0x126 sync2脉冲宽度
|
|
|
|
|
|
txBuf[5+3] = 0; //负载0x127
|
|
|
|
|
|
txBuf[6+3] = 0; //负载0x128 sync3脉冲宽度
|
|
|
|
|
|
txBuf[7+3] = 0; //负载0x129
|
|
|
|
|
|
spi_trans( (16'h0122), (`SPI_WRITE), (8), (`IF_IDX(1)) ); //slv2
|
|
|
|
|
|
spi_trans( (16'h0122), (`SPI_WRITE), (8), (`IF_IDX(2)) ); //slv2
|
|
|
|
|
|
spi_trans( (16'h0122), (`SPI_WRITE), (8), (`IF_IDX(3)) ); //slv2
|
|
|
|
|
|
spi_trans( (16'h0122), (`SPI_WRITE), (8), (`IF_IDX(4)) ); //slv2
|
2025-05-28 10:34:26 +08:00
|
|
|
|
|
|
|
|
|
|
#100000
|
2025-06-04 10:56:59 +08:00
|
|
|
|
_t_end = $realtime;
|
|
|
|
|
|
$fdisplay(spidata_file, "该测试用例运行时间:%t\n", _t_end - _t_start);
|
2025-05-27 12:49:55 +08:00
|
|
|
|
end
|
2025-05-28 10:34:26 +08:00
|
|
|
|
`endif
|
2025-05-28 00:40:35 +08:00
|
|
|
|
|
2025-05-28 10:34:26 +08:00
|
|
|
|
`ifdef ENABLE_SYNC_SIG1_TEST
|
2025-05-28 00:40:35 +08:00
|
|
|
|
begin:SYNC_TESTCASE2
|
2025-06-04 10:56:59 +08:00
|
|
|
|
_t_start = $realtime;
|
2025-05-28 00:40:35 +08:00
|
|
|
|
#1000
|
2025-05-30 19:02:15 +08:00
|
|
|
|
$fdisplay(spidata_file, "\n\n测试用例:测试同步信号(脉冲)");
|
2025-05-28 00:40:35 +08:00
|
|
|
|
|
|
|
|
|
|
`include "sync_sig2_pkt.vh"
|
|
|
|
|
|
|
|
|
|
|
|
//spi_trans( (16'h0100), (`SPI_READ), (32), (`IF_IDX(0)) );
|
|
|
|
|
|
spi_trans( (16'h0100), (`SPI_READ), (16'h48), (`IF_IDX(1)) );
|
|
|
|
|
|
spi_trans( (16'h0100), (`SPI_READ), (16'h48), (`IF_IDX(2)) );
|
|
|
|
|
|
spi_trans( (16'h0100), (`SPI_READ), (16'h48), (`IF_IDX(3)) );
|
|
|
|
|
|
spi_trans( (16'h0100), (`SPI_READ), (16'h48), (`IF_IDX(4)) );
|
|
|
|
|
|
|
2025-06-04 10:56:59 +08:00
|
|
|
|
_t_end = $realtime;
|
|
|
|
|
|
$fdisplay(spidata_file, "该测试用例运行时间:%t\n", _t_end - _t_start);
|
2025-05-28 00:40:35 +08:00
|
|
|
|
end
|
2025-05-27 12:49:55 +08:00
|
|
|
|
`endif
|
|
|
|
|
|
|
2025-06-06 12:03:09 +08:00
|
|
|
|
`ifdef ENABLE_RESET_TEST
|
|
|
|
|
|
begin:RESET_SYSTEM_TEST
|
|
|
|
|
|
$fdisplay(spidata_file, "\n\n测试用例:复位系统测试");
|
|
|
|
|
|
txBuf[0+3] = 8'h0f;
|
|
|
|
|
|
txBuf[1+3] = 8'h00;
|
|
|
|
|
|
txBuf[2+3] = 8'h00;
|
|
|
|
|
|
txBuf[3+3] = 8'h80;
|
|
|
|
|
|
spi_trans( (16'h78), (`SPI_WRITE), (4), (`IF_IDX(0)) );
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
#50000
|
|
|
|
|
|
//复位系统
|
2025-06-09 14:03:50 +08:00
|
|
|
|
$fdisplay(spidata_file, "-复位系统");
|
2025-06-06 12:03:09 +08:00
|
|
|
|
txBuf[0+3] = 8'h01;
|
2025-06-26 11:12:18 +08:00
|
|
|
|
txBuf[0+4] = 8'h00;
|
|
|
|
|
|
txBuf[0+5] = 8'h66;
|
|
|
|
|
|
txBuf[0+6] = 8'h79;
|
|
|
|
|
|
spi_trans( (16'h40), (`SPI_WRITE), (4), (`IF_IDX(0)) );//复位主站
|
|
|
|
|
|
spi_trans( (16'h40), (`SPI_WRITE), (4), (`IF_IDX(2)) );//复位从站2
|
2025-06-09 14:03:50 +08:00
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
$fdisplay(spidata_file, "-配置系统");
|
|
|
|
|
|
#50000
|
|
|
|
|
|
txBuf[0+3] = 8'h01;
|
|
|
|
|
|
spi_trans( (16'h00), (`SPI_WRITE), (1), (`IF_IDX(0)) );
|
|
|
|
|
|
|
|
|
|
|
|
txBuf[0+3] = 8'h02;
|
|
|
|
|
|
spi_trans( (16'h00), (`SPI_WRITE), (1), (`IF_IDX(2)) );
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
#1000
|
|
|
|
|
|
|
|
|
|
|
|
$fdisplay(spidata_file, "\n广播读:使用SM2");
|
|
|
|
|
|
$fdisplay(spidata_file, "-广播读");
|
|
|
|
|
|
|
|
|
|
|
|
`include "sm2_pkt.vh"
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
$fdisplay(spidata_file, "-嗅探:使用SM0");
|
|
|
|
|
|
$fdisplay(spidata_file, "-嗅探前,检查链路状态寄存器");
|
|
|
|
|
|
//spi_trans( (16'h00c0), (`SPI_READ), (6), (`IF_IDX(0)) );
|
|
|
|
|
|
spi_trans( (16'h00c0), (`SPI_READ), (4), (`IF_IDX(1)) );
|
|
|
|
|
|
spi_trans( (16'h00c0), (`SPI_READ), (4), (`IF_IDX(2)) );
|
|
|
|
|
|
spi_trans( (16'h00c0), (`SPI_READ), (4), (`IF_IDX(3)) );
|
|
|
|
|
|
spi_trans( (16'h00c0), (`SPI_READ), (4), (`IF_IDX(4)) );
|
|
|
|
|
|
|
|
|
|
|
|
$fdisplay(spidata_file, "-嗅探");
|
|
|
|
|
|
//设置SM1在写入0x3地址触发enq
|
|
|
|
|
|
|
|
|
|
|
|
`include "detect_pkt.vh"
|
|
|
|
|
|
|
|
|
|
|
|
$fdisplay(spidata_file, "-嗅探后,检查链路状态寄存器");
|
|
|
|
|
|
//spi_trans( (16'h00c0), (`SPI_READ), (6), (`IF_IDX(0)) );
|
|
|
|
|
|
spi_trans( (16'h00c0), (`SPI_READ), (4), (`IF_IDX(1)) );
|
|
|
|
|
|
spi_trans( (16'h00c0), (`SPI_READ), (4), (`IF_IDX(2)) );
|
|
|
|
|
|
spi_trans( (16'h00c0), (`SPI_READ), (4), (`IF_IDX(3)) );
|
|
|
|
|
|
spi_trans( (16'h00c0), (`SPI_READ), (4), (`IF_IDX(4)) );
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
$fdisplay(spidata_file, "-设置顺序地址前,检查顺序地址");
|
|
|
|
|
|
//spi_trans( (16'h0010), (`SPI_READ), (5), (`IF_IDX(0)) );
|
|
|
|
|
|
spi_trans( (16'h0000), (`SPI_READ), (16), (`IF_IDX(1)) );
|
|
|
|
|
|
spi_trans( (16'h0000), (`SPI_READ), (16), (`IF_IDX(2)) );
|
|
|
|
|
|
spi_trans( (16'h0000), (`SPI_READ), (16), (`IF_IDX(3)) );
|
|
|
|
|
|
spi_trans( (16'h0000), (`SPI_READ), (16), (`IF_IDX(4)) );
|
|
|
|
|
|
|
|
|
|
|
|
$fdisplay(spidata_file, "-设置顺序地址");
|
|
|
|
|
|
`include "set_addr_pkt.vh"
|
|
|
|
|
|
|
|
|
|
|
|
//测试
|
|
|
|
|
|
spi_trans( (16'hc0), (`SPI_READ), (6), (`IF_IDX(3)) );
|
|
|
|
|
|
spi_trans( (16'h0a), (`SPI_READ), (2), (`IF_IDX(1)) );
|
|
|
|
|
|
spi_trans( (16'h0a), (`SPI_READ), (2), (`IF_IDX(2)) );
|
|
|
|
|
|
spi_trans( (16'h0a), (`SPI_READ), (2), (`IF_IDX(3)) );
|
|
|
|
|
|
spi_trans( (16'h0a), (`SPI_READ), (2), (`IF_IDX(4)) );
|
|
|
|
|
|
|
|
|
|
|
|
//读写
|
|
|
|
|
|
#1000
|
|
|
|
|
|
$fdisplay(spidata_file, "-设置顺序地址后,检查顺序地址");
|
|
|
|
|
|
spi_trans( (16'h0000), (`SPI_READ), (16), (`IF_IDX(1)) );
|
|
|
|
|
|
spi_trans( (16'h0000), (`SPI_READ), (16), (`IF_IDX(2)) );
|
|
|
|
|
|
spi_trans( (16'h0000), (`SPI_READ), (16), (`IF_IDX(3)) );
|
|
|
|
|
|
spi_trans( (16'h0000), (`SPI_READ), (16), (`IF_IDX(4)) );
|
|
|
|
|
|
|
|
|
|
|
|
#1000
|
|
|
|
|
|
|
|
|
|
|
|
$fdisplay(spidata_file, "\n广播读:使用SM2");
|
|
|
|
|
|
$fdisplay(spidata_file, "-广播读");
|
|
|
|
|
|
|
|
|
|
|
|
`include "sm2_pkt.vh"
|
|
|
|
|
|
|
2025-06-09 18:02:32 +08:00
|
|
|
|
|
2025-06-09 14:03:50 +08:00
|
|
|
|
$fdisplay(spidata_file, "\n\n测试用例:测试同步(sync)和同步输出(sync_out)");
|
|
|
|
|
|
|
|
|
|
|
|
//设置SM1在写入 0x18 len触发enq
|
|
|
|
|
|
`include "sync_pkt.vh"
|
|
|
|
|
|
|
2025-06-09 18:02:32 +08:00
|
|
|
|
/*
|
2025-06-09 14:03:50 +08:00
|
|
|
|
#1000
|
|
|
|
|
|
$fdisplay(spidata_file, "\n\n测试用例:测试同步信号(电平)");
|
|
|
|
|
|
|
|
|
|
|
|
`include "sync_sig_pkt.vh"
|
|
|
|
|
|
|
|
|
|
|
|
//spi_trans( (16'h0100), (`SPI_READ), (32), (`IF_IDX(0)) );
|
|
|
|
|
|
spi_trans( (16'h0100), (`SPI_READ), (16'h48), (`IF_IDX(1)) );
|
|
|
|
|
|
spi_trans( (16'h0100), (`SPI_READ), (16'h48), (`IF_IDX(2)) );
|
|
|
|
|
|
spi_trans( (16'h0100), (`SPI_READ), (16'h48), (`IF_IDX(3)) );
|
|
|
|
|
|
spi_trans( (16'h0100), (`SPI_READ), (16'h48), (`IF_IDX(4)) );
|
|
|
|
|
|
|
|
|
|
|
|
#100000
|
|
|
|
|
|
//清脉冲
|
|
|
|
|
|
txBuf[0+3] = 0; //负载0x122 sync0脉冲宽度
|
|
|
|
|
|
txBuf[1+3] = 0; //负载0x123
|
|
|
|
|
|
txBuf[2+3] = 0; //负载0x124 sync1脉冲宽度
|
|
|
|
|
|
txBuf[3+3] = 0; //负载0x125
|
|
|
|
|
|
txBuf[4+3] = 0; //负载0x126 sync2脉冲宽度
|
|
|
|
|
|
txBuf[5+3] = 0; //负载0x127
|
|
|
|
|
|
txBuf[6+3] = 0; //负载0x128 sync3脉冲宽度
|
|
|
|
|
|
txBuf[7+3] = 0; //负载0x129
|
|
|
|
|
|
spi_trans( (16'h0122), (`SPI_WRITE), (8), (`IF_IDX(1)) ); //slv2
|
|
|
|
|
|
spi_trans( (16'h0122), (`SPI_WRITE), (8), (`IF_IDX(2)) ); //slv2
|
|
|
|
|
|
spi_trans( (16'h0122), (`SPI_WRITE), (8), (`IF_IDX(3)) ); //slv2
|
|
|
|
|
|
spi_trans( (16'h0122), (`SPI_WRITE), (8), (`IF_IDX(4)) ); //slv2
|
2025-06-09 18:02:32 +08:00
|
|
|
|
*/
|
|
|
|
|
|
|
2025-06-09 14:03:50 +08:00
|
|
|
|
`include "sync_sig3_pkt.vh"
|
|
|
|
|
|
|
|
|
|
|
|
//spi_trans( (16'h0100), (`SPI_READ), (32), (`IF_IDX(0)) );
|
|
|
|
|
|
spi_trans( (16'h0100), (`SPI_READ), (16'h48), (`IF_IDX(1)) );
|
|
|
|
|
|
spi_trans( (16'h0100), (`SPI_READ), (16'h48), (`IF_IDX(2)) );
|
|
|
|
|
|
spi_trans( (16'h0100), (`SPI_READ), (16'h48), (`IF_IDX(3)) );
|
|
|
|
|
|
spi_trans( (16'h0100), (`SPI_READ), (16'h48), (`IF_IDX(4)) );
|
2025-06-09 18:02:32 +08:00
|
|
|
|
|
2025-06-06 12:03:09 +08:00
|
|
|
|
end
|
|
|
|
|
|
`endif
|
2025-06-17 22:52:10 +08:00
|
|
|
|
|
2025-06-19 15:36:44 +08:00
|
|
|
|
`ifdef ENABLE_EBMMU_TC1_TEST
|
|
|
|
|
|
begin:EBMMU_TC1_TEST
|
|
|
|
|
|
_t_start = $realtime;
|
|
|
|
|
|
#1000
|
|
|
|
|
|
|
|
|
|
|
|
$fdisplay(spidata_file, "\n\n测试用例:EBMMU测试 1");
|
|
|
|
|
|
|
|
|
|
|
|
`include "ebmmu_tc1_settings.vh"
|
|
|
|
|
|
|
|
|
|
|
|
`include "ebmmu_tc1_seq_read.vh"
|
|
|
|
|
|
|
|
|
|
|
|
`include "ebmmu_tc1_read.vh"
|
|
|
|
|
|
|
|
|
|
|
|
_t_end = $realtime;
|
|
|
|
|
|
$fdisplay(spidata_file, "该测试用例运行时间:%t\n", _t_end - _t_start);
|
|
|
|
|
|
end
|
|
|
|
|
|
`endif
|
|
|
|
|
|
|
|
|
|
|
|
`ifdef ENABLE_EBMMU_TC2_TEST
|
|
|
|
|
|
begin:EBMMU_TC2_TEST
|
2025-06-17 19:40:25 +08:00
|
|
|
|
_t_start = $realtime;
|
|
|
|
|
|
#1000
|
|
|
|
|
|
|
2025-06-19 15:36:44 +08:00
|
|
|
|
$fdisplay(spidata_file, "\n\n测试用例:EBMMU测试 2");
|
|
|
|
|
|
|
|
|
|
|
|
`include "ebmmu_tc2_settings.vh"
|
2025-06-17 19:40:25 +08:00
|
|
|
|
|
2025-06-19 15:36:44 +08:00
|
|
|
|
`include "ebmmu_tc2_seq_read.vh"
|
2025-05-23 18:48:21 +08:00
|
|
|
|
|
2025-06-19 15:36:44 +08:00
|
|
|
|
`include "ebmmu_tc2_read.vh"
|
2025-06-17 22:52:10 +08:00
|
|
|
|
|
2025-06-17 19:40:25 +08:00
|
|
|
|
|
|
|
|
|
|
_t_end = $realtime;
|
|
|
|
|
|
$fdisplay(spidata_file, "该测试用例运行时间:%t\n", _t_end - _t_start);
|
|
|
|
|
|
end
|
2025-06-19 15:36:44 +08:00
|
|
|
|
`endif
|
|
|
|
|
|
|
2025-06-09 14:03:50 +08:00
|
|
|
|
|
2025-06-19 15:36:44 +08:00
|
|
|
|
`ifdef ENABLE_EBMMU_TC3_TEST
|
2025-06-19 17:55:23 +08:00
|
|
|
|
begin:EBMMU_TC3_TEST
|
|
|
|
|
|
_t_start = $realtime;
|
|
|
|
|
|
#1000
|
|
|
|
|
|
|
|
|
|
|
|
$fdisplay(spidata_file, "\n\n测试用例:EBMMU测试 3");
|
|
|
|
|
|
|
|
|
|
|
|
`include "ebmmu_tc3_settings.vh"
|
|
|
|
|
|
|
|
|
|
|
|
`include "ebmmu_tc3_read.vh"
|
2025-06-19 15:36:44 +08:00
|
|
|
|
|
2025-06-19 17:55:23 +08:00
|
|
|
|
|
|
|
|
|
|
_t_end = $realtime;
|
|
|
|
|
|
$fdisplay(spidata_file, "该测试用例运行时间:%t\n", _t_end - _t_start);
|
|
|
|
|
|
end
|
2025-06-19 15:36:44 +08:00
|
|
|
|
`endif
|
2025-06-09 14:03:50 +08:00
|
|
|
|
|
2025-06-20 15:08:48 +08:00
|
|
|
|
`ifdef ENABLE_EBMMU_TC4_TEST
|
|
|
|
|
|
begin:EBMMU_TC4_TEST
|
|
|
|
|
|
_t_start = $realtime;
|
|
|
|
|
|
#1000
|
|
|
|
|
|
$fdisplay(spidata_file, "\n\n测试用例: ebmmu 测试用4");
|
|
|
|
|
|
$display("read&write @ %d", s_ShinTop_Mst.interface__io_cReg_timeStamp);
|
|
|
|
|
|
|
|
|
|
|
|
txBuf[3] = 8'h80;
|
|
|
|
|
|
txBuf[4] = 8'h00;
|
|
|
|
|
|
spi_trans((16'h0306), (`SPI_WRITE), (2), (`IF_IDX(1)) );//dev1_sm1
|
|
|
|
|
|
|
|
|
|
|
|
txBuf[3] = 8'h98;
|
|
|
|
|
|
txBuf[4] = 8'h00;
|
|
|
|
|
|
spi_trans((16'h030e), (`SPI_WRITE), (2), (`IF_IDX(2)) );//dev2_sm3
|
|
|
|
|
|
|
|
|
|
|
|
txBuf[3] = 8'h81;
|
|
|
|
|
|
txBuf[4] = 8'h00;
|
|
|
|
|
|
spi_trans((16'h0316), (`SPI_WRITE), (2), (`IF_IDX(3)) );//dev2_sm3
|
|
|
|
|
|
|
|
|
|
|
|
txBuf[3] = 8'h8c;
|
|
|
|
|
|
txBuf[4] = 8'h00;
|
|
|
|
|
|
spi_trans((16'h031e), (`SPI_WRITE), (2), (`IF_IDX(4)) );//dev2_sm3
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
for (integer i=0; i < 128; i++) begin
|
|
|
|
|
|
txBuf[i + 3] = i + 1;
|
|
|
|
|
|
end
|
|
|
|
|
|
spi_trans( (16'h1000), (`SPI_WRITE), (128), (`IF_IDX(1)) );
|
|
|
|
|
|
|
|
|
|
|
|
for (integer i=0; i < 152; i++) begin
|
|
|
|
|
|
txBuf[i + 3] = i + 2;
|
|
|
|
|
|
end
|
|
|
|
|
|
spi_trans( (16'h2000), (`SPI_WRITE), (152), (`IF_IDX(2)) );
|
|
|
|
|
|
|
|
|
|
|
|
for (integer i=0; i < 129; i++) begin
|
|
|
|
|
|
txBuf[i + 3] = i + 3;
|
|
|
|
|
|
end
|
|
|
|
|
|
spi_trans( (16'h3000), (`SPI_WRITE), (129), (`IF_IDX(3)) );
|
|
|
|
|
|
|
|
|
|
|
|
for (integer i=0; i < 140; i++) begin
|
|
|
|
|
|
txBuf[i + 3] = i + 4;
|
|
|
|
|
|
end
|
|
|
|
|
|
spi_trans( (16'h4000), (`SPI_WRITE), (140), (`IF_IDX(4)) );
|
|
|
|
|
|
|
|
|
|
|
|
`include "ebmmu_tc4_settings.vh"
|
|
|
|
|
|
|
|
|
|
|
|
`include "ebmmu_tc4_read.vh"
|
|
|
|
|
|
|
|
|
|
|
|
_t_end = $realtime;
|
|
|
|
|
|
$fdisplay(spidata_file, "该测试用例运行时间:%t\n", _t_end - _t_start);
|
|
|
|
|
|
end
|
|
|
|
|
|
`endif
|
|
|
|
|
|
|
2025-05-28 10:34:26 +08:00
|
|
|
|
#1000000
|
2025-05-28 10:01:59 +08:00
|
|
|
|
$display("Testcase Finished! Time Out !!!");
|
|
|
|
|
|
$fclose(spidata_file);
|
|
|
|
|
|
$stop;
|
2025-05-23 14:36:23 +08:00
|
|
|
|
|
2025-05-12 15:41:11 +08:00
|
|
|
|
end
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
endmodule
|
|
|
|
|
|
|