2025-02-10 14:38:49 +08:00
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#include "system_cfg.h"
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#include "sysDef.h"
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#include "tl2cdr.h"
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#include "halfLvdsMacSvr.h"
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2025-02-10 23:59:35 +08:00
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#include "plic.h"
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2025-02-13 22:46:21 +08:00
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#include "clint.h"
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2025-02-10 14:38:49 +08:00
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2025-02-27 12:55:34 +08:00
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#define DETECT_DEVICE_PKT_LEN 4
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#define MAGIC_NUM 0xa53fd1a0U
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#define DETECT_DEV_INTERVAL ((40)/CLINT_MTIME_TICK_PERIOD)
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2025-02-10 14:38:49 +08:00
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//-------------------------------------------------------------------
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uint8_t MST_TX_BUF[TX_BUF_NUM * TX_BUF_MAX_LEN] __attribute__((aligned(32)));
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uint8_t MST_RX_BUF[RX_BUF_NUM * RX_BUF_MAX_LEN] __attribute__((aligned(32)));
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//-------------------------------------------------------------------
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extern const uint8_t int_svr_code[];
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uint32_t (*sys_call)(uint32_t no, ...);
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2025-02-27 12:55:34 +08:00
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2025-02-12 19:41:33 +08:00
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static uint32_t HLM_slave_poll(void);
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2025-02-27 12:55:34 +08:00
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2025-02-12 19:41:33 +08:00
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2025-02-10 14:38:49 +08:00
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uint32_t HLM_poll(uint32_t mode)
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{
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2025-02-12 15:58:50 +08:00
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sys_call = (void *)int_svr_code;
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//复位脉冲
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2025-02-27 12:55:34 +08:00
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//*tx0_softReset = 1;
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i_tx0_softReset(1);
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//*tx1_softReset = 1;
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i_tx1_softReset(1);
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//*rx0_softReset = 1;
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i_rx0_softReset(1);
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//*rx1_softReset = 1;
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i_rx1_softReset(1);
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2025-02-12 15:58:50 +08:00
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2025-02-10 14:38:49 +08:00
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if (mode == WORKMODE_MASTER)
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{
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2025-02-27 12:55:34 +08:00
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uint32_t seq = 0;
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2025-02-10 14:38:49 +08:00
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2025-02-27 12:55:34 +08:00
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while (1)
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2025-02-10 23:59:35 +08:00
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{
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2025-02-27 12:55:34 +08:00
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uint32_t tx_pkt_len;
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uint32_t rx_pkt_len = 0;
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uint32_t rx_start = 0;
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uint32_t status;
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uint32_t is_exit = 0;
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uint32_t intflag;
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uint32_t is_tx_crc;
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uint32_t is_rx_crc;
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uint32_t recv_valid;
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uint32_t i;
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uint32_t *tx_data_ptr = (uint32_t *)MST_TX_BUF;
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uint32_t *rx_data_ptr = (uint32_t *)MST_RX_BUF;
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if (seq == 0)
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2025-02-10 23:59:35 +08:00
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{
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2025-02-27 12:55:34 +08:00
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is_tx_crc = 0;
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is_rx_crc = 0;
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tx_pkt_len = DETECT_DEVICE_PKT_LEN + 4;
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tx_data_ptr[0] = (DETECT_DEVICE_PKT_LEN << 20) | 1;
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tx_data_ptr[1] = MAGIC_NUM;
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}
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else if (seq == 1)
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{
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is_tx_crc = 1;
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is_rx_crc = 1;
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tx_pkt_len = 5 * 4 + 4;
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//准备数据
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tx_data_ptr[0] = ((tx_pkt_len - 4) << 20) | 2;
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tx_data_ptr[1] = 0; //64bit time hi
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tx_data_ptr[2] = 0; //64bit time lo
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tx_data_ptr[3] = 0; //delta time
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tx_data_ptr[4] = 0; //ctr | dev_num
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//tx_data_ptr[5] = 0; //crc
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2025-03-03 10:59:07 +08:00
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}
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else
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{
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is_tx_crc = 1;
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is_rx_crc = 1;
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tx_pkt_len = 320 + 4;
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tx_data_ptr[0] = ((tx_pkt_len - 4) << 20) | 0;
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2025-02-10 23:59:35 +08:00
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2025-03-03 10:59:07 +08:00
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for (i = 4; i < (tx_pkt_len - 4 * is_tx_crc); i++)
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MST_TX_BUF[i] = i;
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2025-02-27 12:55:34 +08:00
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}
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//开始发送工作
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i_tx0_txLen(tx_pkt_len);
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uint32_t tx_index = 0;
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uint32_t rx_index = 0;
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uint32_t tx_len;
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tx_len = is_tx_crc? (tx_pkt_len - 4):tx_pkt_len;
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2025-03-03 10:59:07 +08:00
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tx_len = tx_len >> 2;
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2025-02-10 23:59:35 +08:00
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2025-02-27 12:55:34 +08:00
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//i_tx0_clear_timer(0);
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for (i = 0; i < HLM_TX_FIFO_LEN; i++)
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2025-02-10 14:38:49 +08:00
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{
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2025-03-03 10:59:07 +08:00
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if (tx_index < tx_len)
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2025-02-12 17:52:55 +08:00
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{
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2025-02-27 12:55:34 +08:00
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i_tx0_txFifo(tx_data_ptr[tx_index]);
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2025-02-12 17:52:55 +08:00
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tx_index++;
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}
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else
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2025-02-27 12:55:34 +08:00
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{
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if (is_tx_crc)
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{
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uint32_t crc;
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i_tx0_txCrc(crc);
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i_tx0_txFifo(crc);
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tx_index++;
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}
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2025-02-12 17:52:55 +08:00
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break;
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2025-02-27 12:55:34 +08:00
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}
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2025-02-12 01:17:54 +08:00
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}
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2025-02-27 12:55:34 +08:00
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while (!is_exit)
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2025-02-10 23:59:35 +08:00
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{
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2025-02-27 12:55:34 +08:00
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uint32_t tx_times;
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2025-02-12 17:52:55 +08:00
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2025-02-27 12:55:34 +08:00
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//i_tx1_softReset(1);
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i_hlm_status(status);
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i_hlm_read_intflag(intflag);
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2025-03-03 10:59:07 +08:00
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2025-02-27 12:55:34 +08:00
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tx_times = HLM_TX_FIFO_LEN - HLM_TX0_FIFO_LEFT(status);
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for (i = 0; i < tx_times; i++)
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{
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2025-03-03 10:59:07 +08:00
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if (tx_index < tx_len)
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2025-02-27 12:55:34 +08:00
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{
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i_tx0_txFifo(tx_data_ptr[tx_index]);
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tx_index++;
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}
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else
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2025-02-12 17:52:55 +08:00
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{
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2025-03-03 10:59:07 +08:00
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if (is_tx_crc && (tx_index == tx_len))
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2025-02-27 12:55:34 +08:00
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{
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uint32_t crc;
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i_tx0_txCrc(crc);
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i_tx0_txFifo(crc);
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tx_index++;
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}
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2025-02-12 17:52:55 +08:00
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break;
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}
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2025-02-10 14:38:49 +08:00
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}
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2025-02-27 12:55:34 +08:00
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2025-03-03 10:59:07 +08:00
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i_hlm_clear_intflag(intflag);
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2025-02-27 12:55:34 +08:00
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for (i = 0; i < HLM_RX1_FIFO_LEFT(status); i++)
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{
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if (rx_start)
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{
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2025-03-03 10:59:07 +08:00
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if ((rx_pkt_len - 1) == rx_index)
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2025-02-27 12:55:34 +08:00
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{
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uint32_t crc;
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i_rx1_rxCrc(crc);
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i_rx1_rxFifo(rx_data_ptr[rx_index]);
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if (is_rx_crc)
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while (crc != rx_data_ptr[rx_index]);
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}
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else
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{
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i_rx1_rxFifo(rx_data_ptr[rx_index]);
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}
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if (rx_index == 0)
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{
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rx_pkt_len = (rx_data_ptr[rx_index] >> 20) + 4;
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2025-03-03 10:59:07 +08:00
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rx_pkt_len = rx_pkt_len >> 2;
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2025-02-27 12:55:34 +08:00
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}
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rx_index++;
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2025-03-03 10:59:07 +08:00
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if (rx_pkt_len < rx_index)
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2025-02-27 12:55:34 +08:00
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{
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rx_start = 0;
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rx_index = 0;
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break;
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}
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}
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}
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//if ((rx_start == 0) && (status & HLM_RX1_VALID))
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if (intflag & HLM_INT_RX1_START)
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{
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//exti_isr_flag[CDR_INT_RX1START] = 0;
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rx_start = 1;
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rx_index = 0;
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}
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if (intflag & HLM_INT_RX1_END)
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{
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is_exit = 1;
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i_rx1_softReset(1);
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i_tx0_softReset(1);
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}
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2025-02-10 14:38:49 +08:00
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}
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2025-02-27 12:55:34 +08:00
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if (seq == 0)
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2025-02-10 14:38:49 +08:00
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{
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2025-03-03 10:59:07 +08:00
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if ((rx_pkt_len == 2) && ((rx_data_ptr[0] & 0xff) == 0x1) && (rx_data_ptr[1] == MAGIC_NUM))
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2025-02-27 12:55:34 +08:00
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{
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seq = 1;
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}
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}
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else if (seq == 1)
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{
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2025-02-10 14:38:49 +08:00
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}
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}
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2025-02-13 22:46:21 +08:00
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2025-02-10 14:38:49 +08:00
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}
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else if (mode == WORKMODE_SLAVE)
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{
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2025-02-12 19:41:33 +08:00
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HLM_slave_poll();
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}
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else
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{
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}
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return 0;
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}
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2025-02-27 12:55:34 +08:00
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uint32_t HLM_slave_2streams_poll(uint32_t protocol, uint32_t data, uint32_t is_crc);
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uint32_t HLM_slave_1stream_poll(uint32_t protocol, uint32_t data, uint32_t is_crc);
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2025-02-15 01:05:16 +08:00
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2025-02-12 19:41:33 +08:00
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uint32_t HLM_slave_poll(void)
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{
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2025-02-15 01:05:16 +08:00
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uint32_t detect_work = 0;
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2025-02-27 12:55:34 +08:00
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uint32_t downstream_work = 0;
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2025-02-12 19:41:33 +08:00
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2025-02-15 01:05:16 +08:00
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uint32_t hlm_status;
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2025-02-12 19:41:33 +08:00
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uint32_t is_terminal = 1;
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2025-02-15 01:05:16 +08:00
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uint32_t detect_result = 0;
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2025-02-27 12:55:34 +08:00
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uint32_t intflag;
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uint32_t protocol = 0;
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2025-02-15 01:05:16 +08:00
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uint64_t stamp_time;
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uint64_t cur_time;
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2025-02-12 19:41:33 +08:00
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//填充检测下行设备的包
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uint32_t detect_pkt = MAGIC_NUM;
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int i;
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2025-02-27 12:55:34 +08:00
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//*rx0_rxTxPair = 1;
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i_rx0_txPair(1);
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i_rx0_limitTime(0);
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i_rx1_txPair(0);
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i_rx1_limitTime(0);
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2025-02-12 19:41:33 +08:00
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2025-02-27 12:55:34 +08:00
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//*rx0_rxTimerAim = 0; //240;
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//*rx1_rxTxPair = 0;
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//*rx1_rxTimerAim = 0;
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2025-02-12 19:41:33 +08:00
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2025-02-27 12:55:34 +08:00
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*plic_enable_0_31 = 0;
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2025-02-13 22:46:21 +08:00
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2025-02-27 12:55:34 +08:00
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stamp_time = 0; //read_mtimer();
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2025-02-12 19:41:33 +08:00
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while (1)
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{
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if (is_terminal)
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{//是终节点
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2025-02-27 12:55:34 +08:00
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//status = *HLM_status;
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i_hlm_status(hlm_status);
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i_hlm_read_intflag(intflag);
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//i_hlm_clear_intflag(intflag);
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//if ((!downstream_work) && (hlm_status & HLM_RX0_VALID))
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// downstream_work = 1;
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if (intflag & HLM_INT_RX0_START)
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2025-02-15 01:05:16 +08:00
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{
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2025-02-27 12:55:34 +08:00
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downstream_work = 1;
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i_hlm_clear_intflag(HLM_INT_RX0_START);
|
2025-02-15 01:05:16 +08:00
|
|
|
}
|
2025-02-27 12:55:34 +08:00
|
|
|
|
|
|
|
|
if (downstream_work && (hlm_status & HLM_RX0_VALID))
|
2025-02-12 15:58:50 +08:00
|
|
|
{
|
2025-02-15 01:05:16 +08:00
|
|
|
uint32_t data;
|
2025-02-27 12:55:34 +08:00
|
|
|
|
|
|
|
|
i_rx0_rxFifo(data);
|
|
|
|
|
|
|
|
|
|
protocol = (data & 0xff);
|
|
|
|
|
|
|
|
|
|
if ((protocol == 2) && (detect_result) && (detect_work == 0))
|
|
|
|
|
{
|
|
|
|
|
HLM_slave_2streams_poll(protocol, data, 0);
|
2025-02-12 19:41:33 +08:00
|
|
|
}
|
|
|
|
|
else
|
2025-02-27 12:55:34 +08:00
|
|
|
{
|
|
|
|
|
HLM_slave_1stream_poll(protocol, data, 0);
|
|
|
|
|
}
|
2025-02-12 15:58:50 +08:00
|
|
|
}
|
2025-02-10 23:59:35 +08:00
|
|
|
|
2025-02-27 12:55:34 +08:00
|
|
|
if (detect_work == 1)
|
2025-02-12 19:41:33 +08:00
|
|
|
{
|
2025-02-27 12:55:34 +08:00
|
|
|
detect_work = 2;
|
2025-02-10 14:38:49 +08:00
|
|
|
|
2025-02-27 12:55:34 +08:00
|
|
|
//*tx0_txLen = DETECT_DEVICE_PKT_TX_LEN;
|
|
|
|
|
i_tx0_clear_timer(0);
|
2025-02-15 01:05:16 +08:00
|
|
|
|
2025-02-27 12:55:34 +08:00
|
|
|
i_tx0_txLen(DETECT_DEVICE_PKT_LEN + 4);
|
|
|
|
|
//*tx0_txFifo = (DETECT_DEVICE_PKT_LEN << 20) | 1;
|
|
|
|
|
i_tx0_txFifo(((DETECT_DEVICE_PKT_LEN << 20) | 1));
|
|
|
|
|
//*tx0_txFifo = detect_pkt;
|
|
|
|
|
i_tx0_txFifo(detect_pkt);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (detect_work == 2)
|
|
|
|
|
{
|
|
|
|
|
if (HLM_RX1_FIFO_LEFT(hlm_status) >= 2)
|
2025-02-10 23:59:35 +08:00
|
|
|
{
|
2025-02-15 01:05:16 +08:00
|
|
|
uint32_t data;
|
|
|
|
|
uint32_t num;
|
|
|
|
|
uint32_t dummy;
|
|
|
|
|
|
2025-02-27 12:55:34 +08:00
|
|
|
//data = *rx1_rxFifo;
|
|
|
|
|
i_rx1_rxFifo(data);
|
|
|
|
|
//num = *rx1_rxFifo;
|
|
|
|
|
i_rx1_rxFifo(num);
|
2025-02-15 01:05:16 +08:00
|
|
|
for (i = 0; i < HLM_RX1_FIFO_LEFT(hlm_status) - 2; i++)
|
2025-02-27 12:55:34 +08:00
|
|
|
{
|
|
|
|
|
//dummy = *rx1_rxFifo;
|
|
|
|
|
i_rx1_rxFifo(dummy);
|
|
|
|
|
}
|
2025-02-15 01:05:16 +08:00
|
|
|
|
2025-02-27 12:55:34 +08:00
|
|
|
//*rx1_softReset = 1;
|
|
|
|
|
i_rx1_softReset(1);
|
|
|
|
|
//*tx0_softReset = 1;
|
|
|
|
|
i_tx0_softReset(1);
|
2025-02-15 01:05:16 +08:00
|
|
|
|
|
|
|
|
if (((data & 0xff) == 0x1) && (num == MAGIC_NUM))
|
|
|
|
|
detect_result = 1;
|
2025-02-27 12:55:34 +08:00
|
|
|
else
|
|
|
|
|
detect_result = 0;
|
2025-02-15 01:05:16 +08:00
|
|
|
|
2025-02-27 12:55:34 +08:00
|
|
|
detect_work = 0;
|
2025-02-15 01:05:16 +08:00
|
|
|
}
|
2025-02-27 12:55:34 +08:00
|
|
|
else
|
2025-02-15 01:05:16 +08:00
|
|
|
{
|
2025-02-27 12:55:34 +08:00
|
|
|
uint32_t t;
|
|
|
|
|
i_tx0_read_timer(t);
|
|
|
|
|
if (t >= 600)
|
2025-02-15 01:05:16 +08:00
|
|
|
{
|
2025-02-27 12:55:34 +08:00
|
|
|
i_rx1_softReset(1);
|
|
|
|
|
i_tx0_softReset(1);
|
|
|
|
|
|
|
|
|
|
detect_work = 0;
|
|
|
|
|
detect_result = 0;
|
2025-02-15 01:05:16 +08:00
|
|
|
}
|
|
|
|
|
}
|
2025-02-27 12:55:34 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if ((detect_work == 0) && (downstream_work == 0))
|
|
|
|
|
{
|
|
|
|
|
cur_time = read_mtimer();
|
|
|
|
|
//i_tx0_read_timer(cur_time);
|
|
|
|
|
if ((cur_time - stamp_time) >= DETECT_DEV_INTERVAL)
|
|
|
|
|
{
|
|
|
|
|
stamp_time = cur_time;
|
|
|
|
|
detect_work = 1;
|
2025-02-10 23:59:35 +08:00
|
|
|
}
|
2025-02-13 22:46:21 +08:00
|
|
|
}
|
2025-02-10 14:38:49 +08:00
|
|
|
}
|
2025-02-12 19:41:33 +08:00
|
|
|
else
|
|
|
|
|
{//不是终节点
|
2025-02-10 14:38:49 +08:00
|
|
|
|
2025-02-12 19:41:33 +08:00
|
|
|
}
|
2025-02-10 14:38:49 +08:00
|
|
|
}
|
2025-02-12 19:41:33 +08:00
|
|
|
}
|
2025-02-10 14:38:49 +08:00
|
|
|
|
|
|
|
|
|
2025-02-27 12:55:34 +08:00
|
|
|
uint32_t HLM_slave_1stream_poll(uint32_t protocol, uint32_t data, uint32_t is_crc)
|
|
|
|
|
{
|
|
|
|
|
uint32_t hlm_status;
|
|
|
|
|
uint32_t intflag;
|
|
|
|
|
uint32_t i;
|
|
|
|
|
|
|
|
|
|
uint32_t downstream_work = 1;
|
|
|
|
|
uint32_t upstream_work = 0;
|
|
|
|
|
|
|
|
|
|
uint32_t d_rx_index = 0;
|
|
|
|
|
uint32_t d_rx_pkt_len;
|
|
|
|
|
uint32_t u_rx_index = 0;
|
|
|
|
|
uint32_t u_rx_pkt_len = 0;
|
|
|
|
|
|
|
|
|
|
d_rx_pkt_len = (data >> 20) + 4;
|
|
|
|
|
i_tx1_txLen(d_rx_pkt_len);
|
|
|
|
|
i_tx1_txFifo(data);
|
|
|
|
|
d_rx_index++;
|
|
|
|
|
|
|
|
|
|
while (1)
|
|
|
|
|
{
|
|
|
|
|
i_hlm_status(hlm_status);
|
|
|
|
|
i_hlm_read_intflag(intflag);
|
2025-03-03 10:59:07 +08:00
|
|
|
|
2025-02-27 12:55:34 +08:00
|
|
|
|
|
|
|
|
for (i = 0; i < HLM_RX0_FIFO_LEFT(hlm_status); i++)
|
|
|
|
|
{
|
|
|
|
|
uint32_t data;
|
|
|
|
|
if (downstream_work)
|
|
|
|
|
{//处理下行接收
|
|
|
|
|
i_rx0_rxFifo(data);
|
|
|
|
|
|
|
|
|
|
d_rx_index++;
|
|
|
|
|
|
|
|
|
|
if (d_rx_pkt_len > (d_rx_index * 4))
|
|
|
|
|
{
|
2025-03-03 10:59:07 +08:00
|
|
|
if ((d_rx_pkt_len - 4) == (d_rx_index * 4))
|
|
|
|
|
{
|
|
|
|
|
if (protocol == 2)
|
|
|
|
|
{
|
|
|
|
|
uint32_t ctr = (data >> 16) & 0xffff;
|
|
|
|
|
ctr++;
|
|
|
|
|
data = (ctr << 16) | (data & 0xffff);
|
|
|
|
|
}
|
|
|
|
|
}
|
2025-02-27 12:55:34 +08:00
|
|
|
i_tx1_txFifo(data);
|
|
|
|
|
}
|
|
|
|
|
else if (d_rx_pkt_len == (d_rx_index * 4))
|
|
|
|
|
{
|
2025-03-03 10:59:07 +08:00
|
|
|
if (protocol == 2)
|
|
|
|
|
i_tx1_txCrc(data);
|
2025-02-27 12:55:34 +08:00
|
|
|
i_tx1_txFifo(data);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
downstream_work = 0;
|
|
|
|
|
d_rx_index = 0;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
break;
|
|
|
|
|
}
|
2025-03-03 10:59:07 +08:00
|
|
|
|
|
|
|
|
i_hlm_clear_intflag(intflag);
|
|
|
|
|
|
2025-02-27 12:55:34 +08:00
|
|
|
if (intflag & HLM_INT_TX1_END)
|
|
|
|
|
{
|
|
|
|
|
i_rx0_softReset(1);
|
|
|
|
|
i_tx1_softReset(1);
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
#define HLM_Slave_2streams_down_poll(ds_work, index, pkt_len, intflag, status) \
|
|
|
|
|
do {\
|
|
|
|
|
if (status & HLM_RX0_VALID)\
|
|
|
|
|
{\
|
|
|
|
|
uint32_t data;\
|
|
|
|
|
if (ds_work)\
|
|
|
|
|
{/*处理下行接收*/ \
|
|
|
|
|
i_rx0_rxFifo(data);\
|
|
|
|
|
index++;\
|
|
|
|
|
if (pkt_len > (index))\
|
|
|
|
|
{\
|
2025-03-03 10:59:07 +08:00
|
|
|
if ((pkt_len - 1) == index)\
|
|
|
|
|
{\
|
|
|
|
|
uint32_t ctr = (data >> 16) & 0xffff;\
|
|
|
|
|
ctr++;\
|
|
|
|
|
data = (ctr << 16) | (data & 0xffff);\
|
|
|
|
|
}\
|
2025-02-27 12:55:34 +08:00
|
|
|
i_tx0_txFifo(data);\
|
|
|
|
|
}\
|
|
|
|
|
else if (pkt_len == (index))\
|
|
|
|
|
{\
|
2025-03-03 10:59:07 +08:00
|
|
|
i_tx0_txCrc(data);\
|
2025-02-27 12:55:34 +08:00
|
|
|
i_tx0_txFifo(data);\
|
|
|
|
|
}\
|
|
|
|
|
else\
|
|
|
|
|
{\
|
|
|
|
|
ds_work = 0;\
|
|
|
|
|
index = 0;\
|
|
|
|
|
}\
|
|
|
|
|
}\
|
|
|
|
|
}\
|
|
|
|
|
} while (0)
|
|
|
|
|
|
|
|
|
|
#define HLM_Slave_2streams_up_poll(us_work, index, pkt_len, intflag, status) \
|
|
|
|
|
do {\
|
|
|
|
|
if (status & HLM_RX1_VALID)\
|
|
|
|
|
{\
|
|
|
|
|
uint32_t data;\
|
|
|
|
|
if (us_work)\
|
|
|
|
|
{/*处理上行接收*/\
|
|
|
|
|
i_rx1_rxFifo(data);\
|
|
|
|
|
if (index == 0)\
|
|
|
|
|
{\
|
|
|
|
|
pkt_len = (data >> 20) + 4;\
|
|
|
|
|
i_tx1_txLen(pkt_len);\
|
|
|
|
|
pkt_len = (pkt_len >> 2);\
|
|
|
|
|
}\
|
|
|
|
|
index++;\
|
|
|
|
|
if (pkt_len > (index))\
|
|
|
|
|
{\
|
|
|
|
|
i_tx1_txFifo(data);\
|
|
|
|
|
}\
|
|
|
|
|
else if (pkt_len == (index))\
|
|
|
|
|
{\
|
|
|
|
|
i_tx1_txFifo(data);\
|
|
|
|
|
}\
|
|
|
|
|
else\
|
|
|
|
|
{\
|
|
|
|
|
us_work = 0;\
|
|
|
|
|
index = 0;\
|
|
|
|
|
/*is_work = 0;*/\
|
|
|
|
|
}\
|
|
|
|
|
}\
|
|
|
|
|
}\
|
|
|
|
|
} while (0)
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
uint32_t HLM_slave_2streams_poll(uint32_t protocol, uint32_t data, uint32_t is_crc)
|
|
|
|
|
{
|
|
|
|
|
uint32_t hlm_status;
|
|
|
|
|
uint32_t intflag;
|
|
|
|
|
uint32_t i;
|
|
|
|
|
|
|
|
|
|
uint32_t downstream_work = 1;
|
|
|
|
|
uint32_t upstream_work = 0;
|
|
|
|
|
|
|
|
|
|
uint32_t d_rx_index = 0;
|
|
|
|
|
uint32_t d_rx_pkt_len = 0;
|
|
|
|
|
uint32_t u_rx_index = 0;
|
|
|
|
|
uint32_t u_rx_pkt_len = 0;
|
|
|
|
|
//uint32_t is_work = 1;
|
|
|
|
|
|
|
|
|
|
d_rx_pkt_len = (data >> 20) + 4;
|
|
|
|
|
i_tx0_txLen(d_rx_pkt_len);
|
|
|
|
|
i_tx0_txFifo(data);
|
|
|
|
|
d_rx_pkt_len = (d_rx_pkt_len >> 2);
|
|
|
|
|
d_rx_index++;
|
|
|
|
|
|
|
|
|
|
while (1)
|
|
|
|
|
{
|
|
|
|
|
i_hlm_status(hlm_status);
|
|
|
|
|
i_hlm_read_intflag(intflag);
|
|
|
|
|
|
|
|
|
|
HLM_Slave_2streams_down_poll(downstream_work,
|
|
|
|
|
d_rx_index,
|
|
|
|
|
d_rx_pkt_len,
|
|
|
|
|
intflag,
|
|
|
|
|
hlm_status);
|
|
|
|
|
|
2025-03-03 10:59:07 +08:00
|
|
|
i_hlm_clear_intflag(intflag);
|
|
|
|
|
|
2025-02-27 12:55:34 +08:00
|
|
|
if (intflag & HLM_INT_RX1_START)
|
|
|
|
|
{
|
|
|
|
|
upstream_work = 1;
|
|
|
|
|
intflag = 0;
|
|
|
|
|
do {
|
|
|
|
|
i_hlm_status(hlm_status);
|
|
|
|
|
//i_hlm_read_intflag(intflag);
|
|
|
|
|
//i_hlm_clear_intflag(intflag);
|
|
|
|
|
|
|
|
|
|
HLM_Slave_2streams_down_poll(downstream_work,
|
|
|
|
|
d_rx_index,
|
|
|
|
|
d_rx_pkt_len,
|
|
|
|
|
intflag,
|
|
|
|
|
hlm_status);
|
|
|
|
|
|
|
|
|
|
HLM_Slave_2streams_up_poll(upstream_work,
|
|
|
|
|
u_rx_index,
|
|
|
|
|
u_rx_pkt_len,
|
|
|
|
|
intflag,
|
|
|
|
|
hlm_status);
|
|
|
|
|
} while ((upstream_work) || (downstream_work));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (intflag & HLM_INT_TX1_END)
|
|
|
|
|
{
|
|
|
|
|
i_tx0_softReset(1);
|
|
|
|
|
i_tx1_softReset(1);
|
|
|
|
|
i_rx0_softReset(1);
|
|
|
|
|
i_rx1_softReset(1);
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|