30 lines
651 B
Scala
30 lines
651 B
Scala
package test
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import MAC._
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import chisel3._
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import chisel3.stage._
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import freechips.rocketchip.diplomacy._
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import org.chipsalliance.cde.config._
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object testModule extends App {
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// (new chisel3.stage.ChiselStage).execute( Array("--target-dir", "generated/", "-e", "verilog" ) ++ args, Seq(
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// ChiselGeneratorAnnotation(() => {
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// new Mac
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// })
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// ))
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val cfg = new MacCfg
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(new chisel3.stage.ChiselStage).execute( Array("--show-registrations", "--full-stacktrace", "--target-dir", "generated/Main") ++ args, Seq(
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ChiselGeneratorAnnotation(() => {
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val soc = LazyModule(new MacAXI()(cfg))
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soc.module
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})
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))
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}
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