This website requires JavaScript.
Explore
Help
Sign In
ruige
/
eb001
Watch
1
Star
0
Fork
0
You've already forked eb001
Code
Issues
Pull Requests
Actions
Packages
Projects
Releases
Wiki
Activity
Files
bcbaa5b39b8f9b6cd119017307a15d3508382fc5
eb001
/
src
/
main
/
verilog
History
RuigeLee
bcbaa5b39b
spi格式修改
2024-07-02 19:18:02 +08:00
..
backBoardMstTop.v
临时解决方案
2024-05-24 17:31:49 +08:00
defineParam.v
修改芯片码
2024-05-11 17:21:05 +08:00
di16_top.v
临时解决方案
2024-05-24 17:31:49 +08:00
do16_top.v
dout16增加一个err灯
2024-06-28 14:44:04 +08:00
oser_rst.v
test pass
2023-09-14 19:16:17 +08:00
qei_top.v
测试完成,资源超出
2024-06-25 16:44:19 +08:00
spi_top.v
spi格式修改
2024-07-02 19:18:02 +08:00