Files
eb001/tb/shinTest/gen_sim_cdr_clk.py

53 lines
1.3 KiB
Python
Executable File

#!/usr/bin/env python
#encoding=utf-8
import argparse
from pyutils import *
def set_cdr_clk(v_ph, v_t):
ph = int(8 * 1000000 * (int(abs(v_ph))%360) / 360.0)
period = int(1000000 + v_t)
code_for_clk = __gen_clk(ph, period)
genPkt = GenPkt()
genPkt.clean()
gen_file_def = "simCdrClk"
genPkt.addAfterExc(code_for_clk)
genPkt.gen("./generated/SimCDR/%s.vh"%(gen_file_def, ), 1)
def __gen_clk(ph, period):
slv_code =(
""
#"\tinitial begin\n"
#+"\t\tforever begin #%d clock%d <= ~clock%d; end\n"%(period * 8, clk, clk)
#+"\tend\n\n"
+"\tgenerate\n"
+"\tfor( genvar i = 0; i < 16; i = i + 1 ) begin\n"
+"\t\tinitial begin\n"
+ "\t\t\t//相位信息\n"
+ "\t\t\t#%d\n"%(ph)
+ "\t\t\tmultiCLK[i] = 0;\n"
+ "\t\t\tfor( integer j = 0; j < i; j = j + 1 ) begin\n"
+ "\t\t\t\t#%d\n"%(period, )
+ "\t\t\t\t;\n"
+ "\t\t\tend\n"
+ "\t\t\tforever begin #%d multiCLK[i] <= ~multiCLK[i]; end\n"%(period * 8, )
+"\t\tend\n"
+"\tend\n"
+"\tendgenerate\n")
return slv_code
if __name__ == '__main__':
parser = argparse.ArgumentParser()
# 可选参数
parser.add_argument("-c", "--clk", nargs=2, type=int, default=[0, 0], help="相位(度)、频率偏差ppm")
args = parser.parse_args()
set_cdr_clk(args.clk[0], args.clk[1]);