47 lines
728 B
Scala
47 lines
728 B
Scala
package MAC
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import chisel3._
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import chisel3.util._
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class Transmit_Enq_Ctrl_Bundle extends Bundle{
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}
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class Transmit_Deq_Req_Bundle extends Bundle{
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}
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class Transmit_Deq_Resp_Bundle extends Bundle{
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}
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class Transmit_Enq_Bundle extends Bundle{
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val data = Decoupled(UInt(32.W))
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val ctrl = Decoupled(new Transmit_Enq_Ctrl_Bundle)
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}
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class Transmit_Deq_Bundle extends Bundle{
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val data = Decoupled(UInt(32.W))
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val req = Decoupled(new Transmit_Deq_Req_Bundle)
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val resp = Flipped(Decoupled(new Transmit_Deq_Resp_Bundle))
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}
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class TxBuffIO extends Bundle{
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val enq = Flipped(new Transmit_Enq_Bundle)
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val deq = new Transmit_Deq_Bundle
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}
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class TxBuff extends Module{
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val io: TxBuffIO = IO(new TxBuffIO)
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}
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