319 lines
4.8 KiB
ArmAsm
319 lines
4.8 KiB
ArmAsm
#include "tl2cdr.h"
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.extern main
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.extern plic_handle
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.extern mst_svr_code
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.extern plic_claim
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.extern flag_intTxEnd
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.extern flag_intRxError
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.extern flag_intRxStart
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.extern flag_intRxEnd
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.globl _prog_start
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.section .text.init
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_prog_start:
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li x1, 0
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li x2, 0
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li x3, 0
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li x4, 0
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li x5, 0
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li x6, 0
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li x7, 0
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li x8, 0
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li x9, 0
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li x10, 0
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li x11, 0
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li x12, 0
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li x13, 0
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li x14, 0
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li x15, 0
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#ifdef __RV32I_MARCH__
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li x16, 0
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li x17, 0
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li x18, 0
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li x19, 0
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li x20, 0
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li x21, 0
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li x22, 0
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li x23, 0
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li x24, 0
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li x25, 0
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li x26, 0
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li x27, 0
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li x28, 0
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li x29, 0
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li x30, 0
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li x31, 0
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#endif
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li sp, 0x40011000
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lui t0, %hi(plic_claim)
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lw a0, %lo(plic_claim)(t0)
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#la a0, plic_claim
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#lui t0, %hi(flag_intTxEnd)
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#lw a1, %lo(flag_intTxEnd)(t0)
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la a1, flag_intTxEnd
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#lui t0, %hi(flag_intRxError)
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#lw a2, %lo(flag_intRxError)(t0)
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la a2, flag_intRxError
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#lui t0, %hi(flag_intRxStart)
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#lw a3, %lo(flag_intRxStart)(t0)
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la a3, flag_intRxStart
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#lui t0, %hi(flag_intRxEnd)
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#lw a4, %lo(flag_intRxEnd)(t0)
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la a4, flag_intRxEnd
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call mst_svr_code
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mv t0, a0 #这里选择不同的trap_entry服务函数,这个是RV32I的代码
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#la t0, trap_entry #这个是最初版的trap_entry，仅做了RV32E的改造
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#la t0, opt_trap_entry #这个是做了汇编优化的，也做了RV32E的改造
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csrw mtvec, t0
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li t0, 1 << 11
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csrw mie, t0
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csrr t0, mstatus
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ori t0, t0, 1<<3
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csrw mstatus, t0
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call main
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ecall
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.balign 32
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.section .trap_entry, "ax", %progbits
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trap_entry:
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addi sp,sp,-136
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sw ra,4(sp)
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sw sp,8(sp)
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sw gp,12(sp)
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sw tp,16(sp)
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sw t0,20(sp)
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sw t1,24(sp)
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sw t2,28(sp)
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sw s0,32(sp)
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sw s1,36(sp)
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sw a0,40(sp)
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sw a1,44(sp)
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sw a2,48(sp)
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sw a3,52(sp)
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sw a4,56(sp)
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sw a5,60(sp)
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#ifdef __RV32I_MARCH__
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sw a6,64(sp)
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sw a7,68(sp)
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sw s2,72(sp)
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sw s3,76(sp)
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sw s4,80(sp)
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sw s5,84(sp)
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sw s6,88(sp)
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sw s7,92(sp)
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sw s8,96(sp)
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sw s9,100(sp)
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sw s10,104(sp)
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sw s11,108(sp)
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sw t3,112(sp)
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sw t4,116(sp)
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sw t5,120(sp)
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sw t6,124(sp)
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#endif
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#if 0
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csrr t0, mstatus # 读取 mstatus 寄存器
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andi t0, t0, ~(1 << 3) # 清除 MIE 位 (全局中断禁用)
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csrw mstatus, t0 # 写回 mstatus 寄存器
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#endif
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call plic_handle
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#if 0
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csrr t0, mstatus
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ori t0, t0, 1<<3
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csrw mstatus, t0
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#endif
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lw ra,4(sp)
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lw sp,8(sp)
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lw gp,12(sp)
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lw tp,16(sp)
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lw t0,20(sp)
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lw t1,24(sp)
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lw t2,28(sp)
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lw s0,32(sp)
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lw s1,36(sp)
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lw a0,40(sp)
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lw a1,44(sp)
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lw a2,48(sp)
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lw a3,52(sp)
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lw a4,56(sp)
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lw a5,60(sp)
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#ifdef __RV32I_MARCH__
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lw a6,64(sp)
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lw a7,68(sp)
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lw s2,72(sp)
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lw s3,76(sp)
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lw s4,80(sp)
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lw s5,84(sp)
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lw s6,88(sp)
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lw s7,92(sp)
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lw s8,96(sp)
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lw s9,100(sp)
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lw s10,104(sp)
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lw s11,108(sp)
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lw t3,112(sp)
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lw t4,116(sp)
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lw t5,120(sp)
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lw t6,124(sp)
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#endif
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addi sp,sp,136
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mret
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#.macro define_const name, value
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# .equ \name, \value
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#.endm
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## 使用宏定义常量
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#define_const CDR_INT_TXEND, 14
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opt_trap_entry:
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addi sp,sp,-136
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#sw ra,4(sp)
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#sw sp,8(sp)
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#sw gp,12(sp)
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#sw tp,16(sp)
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sw t0,20(sp)
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sw t1,24(sp)
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#sw t2,28(sp)
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sw s0,32(sp)
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sw s1,36(sp)
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#sw a0,40(sp)
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#sw a1,44(sp)
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#sw a2,48(sp)
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#sw a3,52(sp)
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#sw a4,56(sp)
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#sw a5,60(sp)
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#sw a6,64(sp)
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#sw a7,68(sp)
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#sw s2,72(sp)
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#sw s3,76(sp)
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#sw s4,80(sp)
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#sw s5,84(sp)
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#sw s6,88(sp)
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#sw s7,92(sp)
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#sw s8,96(sp)
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#sw s9,100(sp)
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#sw s10,104(sp)
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#sw s11,108(sp)
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#sw t3,112(sp)
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#sw t4,116(sp)
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#sw t5,120(sp)
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#sw t6,124(sp)
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#if 0
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csrr t0, mstatus # 读取 mstatus 寄存器
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andi t0, t0, ~(1 << 3) # 清除 MIE 位 (全局中断禁用)
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csrw mstatus, t0 # 写回 mstatus 寄存器
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#endif
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lui t1, %hi(plic_claim)
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lw t0, %lo(plic_claim)(t1) # t0 = &plic_claim
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lw t1, 0(t0) # t1 = *plic_claim
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sw t1, 0(t0) # *plic_claim = t1
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li s0, CDR_INT_TXEND
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bne t1, s0, 1f #_if (t1 != s0) goto 1f
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lui s0,%hi(flag_intTxEnd) #_else
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li s1,1
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sw s1,%lo(flag_intTxEnd)(s0)
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j 4f
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1:
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li s0, CDR_INT_RXERROR
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bne t1, s0, 2f #_if (t1 != s0) goto 2f
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lui s0,%hi(flag_intRxError) #_else
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li s1,1
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sw s1,%lo(flag_intRxError)(s0)
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j 4f
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2:
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li s0, CDR_INT_RXSTART
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bne t1, s0, 3f #_if (t1 != s0) goto 3f
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lui s0,%hi(flag_intRxStart) #_else
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li s1,1
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sw s1,%lo(flag_intRxStart)(s0)
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j 4f
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3:
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li s0, CDR_INT_RXEND
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bne t1, s0, 4f #_if (t1 != s0) goto 4f
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lui s0,%hi(flag_intRxEnd) #_else
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li s1,1
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sw s1,%lo(flag_intRxEnd)(s0)
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4:
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#if 0
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csrr t0, mstatus
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ori t0, t0, 1<<3
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csrw mstatus, t0
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#endif
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#lw ra,4(sp)
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#lw sp,8(sp)
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#lw gp,12(sp)
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#lw tp,16(sp)
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lw t0,20(sp)
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lw t1,24(sp)
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#lw t2,28(sp)
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lw s0,32(sp)
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lw s1,36(sp)
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#lw a0,40(sp)
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#lw a1,44(sp)
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#lw a2,48(sp)
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#lw a3,52(sp)
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#lw a4,56(sp)
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#lw a5,60(sp)
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#lw a6,64(sp)
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#lw a7,68(sp)
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#lw s2,72(sp)
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#lw s3,76(sp)
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#lw s4,80(sp)
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#lw s5,84(sp)
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#lw s6,88(sp)
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#lw s7,92(sp)
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#lw s8,96(sp)
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#lw s9,100(sp)
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#lw s10,104(sp)
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#lw s11,108(sp)
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#lw t3,112(sp)
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#lw t4,116(sp)
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#lw t5,120(sp)
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#lw t6,124(sp)
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addi sp,sp,136
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mret
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