RuigeLee 1d5a257b58 Merge branch 'mp_eb_dev' into feature/syncSpi ...

# Conflicts:
#	src/main/scala/backBoard/shin/SpiInterface.scala

2025-09-08 17:07:10 +08:00

..

resources

增加顶层的FPGA上的sync输出,修改测试用例

2025-08-11 18:04:46 +08:00

scala/backBoard

Merge branch 'mp_eb_dev' into feature/syncSpi

2025-09-08 17:07:10 +08:00

verilog

高云FPGA：dout新检测特性；删除退役的版本

2025-03-12 17:36:10 +08:00