package BACK import chisel3._ import chisel3.util._ class FrameHeader extends Bundle{ val frameLenAim = UInt(12.W) //帧长度目标 val frameStyle = UInt(2.W) //包类型 } class SubMsgHeader extends Bundle{ val subMsg_devIndex = UInt(14.W) // 子报文中设备索引 val subMsg_style = UInt(2.W) // 子报文类型 val subMsg_address = UInt(16.W) //子报文地址 val subMsg_operator = UInt(4.W) //子报文命令类型 val subMsg_length = UInt(12.W) //子报文负载长度 val subMsg_workCnt = UInt(16.W) //子报文工作计数 } class ShareSRAMIO extends Bundle{ val addr = Input(UInt(15.W)) val dataw = Input( UInt(8.W) ) val datar = Output( UInt(8.W) ) val enw = Input(Bool()) val enr = Input(Bool()) } class SlaveParserIO extends Module{ val downIn = Flipped( Decoupled(new AXIS_Bundle(8)) ) val downOut = Decoupled(new AXIS_Bundle(8)) val upIn = Flipped( Decoupled(new AXIS_Bundle(8)) ) val upOut = Decoupled(new AXIS_Bundle(8)) val sram_r = for( 0 until 2 ) yield { Flipped(new ShareSRAMIO) } val sram_w = for( 0 until 2 ) yield { Flipped(new ShareSRAMIO) } } abstract class SlaveParserBase extends Module{ val io: SlaveParserIO = IO(new SlaveParserIO) val devIndex = Reg(UInt(14.W)) //当前设备索引 val downRecParser = Module(new SlaveRecParser) val upRecParser = Module(new SlaveRecParser) val downSendGen = Module(new SlaveSendGen) val upSendGen = Module(new SlaveSendGen) val downRecFifo = for( i <- 0 until 2 ) yield { Module(new Queue(UInt(8.W), 8)) } val upRecFifo = for( i <- 0 until 2 ) yield { Module(new Queue(UInt(8.W), 8)) } val downSinkSel = Reg(Bool()) val upSinkSel = Reg(Bool()) val downFrameInfo = Reg(new FrameHeader) val downSubMsgInfo = for( 0 until 2 ) yield { Reg(new SubMsgHeader) } val upFrameInfo = Reg(new FrameHeader) val upSubMsgInfo = for( 0 until 2 ) yield { Reg(new SubMsgHeader) } val isDownSendBusy = downRecParser.io.frameReq.ready val isUpSendBusy = upRecParser.io.frameReq.ready val isDownSendPend = RegInit(false.B) val isUpSendPend = RegInit(false.B) //同时到来怎么办 when( downRecParser.io.frameReq.fire ){ when(downRecParser.io.frameReq.bits.frameStyle === FRAME_STYLE_PROBE){ //下行来了一个嗅探包 isUpSendPend := true.B downFrameInfo := downRecParser.io.frameReq.bits println("Warning! No busy protection!") } .elsewhen( downRecParser.io.frameReq.bits.frameStyle === FRAME_STYLE_COMMON ){ //下行来了一个普通包 isDownSendPend := true.B downFrameInfo := downRecParser.io.frameReq.bits println("Warning! No busy protection!") } } .elsewhen( upRecParser.io.frameReq.fire ){ when( upRecParser.io.frameReq.bits.frameStyle === FRAME_STYLE_PROBE){ //上行来了一个嗅探包 println("Probe Resp!") } .elsewhen( upRecParser.io.frameReq.bits.frameStyle === FRAME_STYLE_COMMON ){ //上行来了一个普通包 isUpSendPend := true.B upFrameInfo := upRecParser.io.frameReq.bits println("Warning! No busy protection!") } } val isDownSendProbe: Bool //下行探针 val isUpSendProbe: Bool //上行探针 val probeFrame: FrameHeader //固定化探针内容 downSendGen.io.frameReq.valid := isDownSendPend | isDownSendProbe //下行转发 | 下行探针 assert( OneHot(isDownSendPend, isDownSendProbe) ) downSendGen.io.frameReq.bits := Mux1H(Seq( isDownSendPend -> downFrameInfo, //下行转发 isDownSendProbe -> probeFrame, //下行探针 )) when( downSendGen.io.frameReq.fire ){ isDownSendPend := false.B } upSendGen.io.frameReq.valid := isUpSendPend | isUpSendProbe //上行转发 | 上行探针 assert( OneHot(isUpSendPend, isUpSendProbe) ) upSendGen.io.frameReq.bits := Mux1H(Seq( isUpSendPend -> upFrameInfo, //上行转发 isUpSendProbe -> probeFrame, //上行探针 )) when( upSendGen.io.frameReq.fire ){ isUpSendPend := false.B } when( downSendGen.io.frameReq.fire ){ isDownSendPend := false.B } upSendFifo.io.enq.bits := Mux1H(Seq( ( downRecParser.io.frameStyle === FRAME_STYLE_PROBE & downRecParser.io.stateCurr > STATE_HEADER ) -> downRecParser.io.data.bits //嗅探包 bypass到上行 )) upSendFifo.io.enq.valid := ((downRecParser.io.frameStyle === FRAME_STYLE_PROBE & downRecParser.io.stateCurr > STATE_HEADER ) & downRecParser.io.data.valid) | downRecParser.io.data.ready := ((downRecParser.io.frameStyle === FRAME_STYLE_PROBE & downRecParser.io.stateCurr > STATE_HEADER ) & upSendFifo.io.enq.ready ) | downSendFifo.io.enq.bits := Mux1H(Seq( ( downRecParser.io.frameStyle === FRAME_STYLE_COMMON & downRecParser.io.stateCurr > STATE_HEADER ) -> )) val isDownIdle val isDownBypassToDown val isDownWriteToSRAM val isDownReadFromSRAM val isDownLoopBack val isUpIdle val isUpBypassToUp val isUpWriteToSRAM val isUpReadFromSRAM val isUpBlackHole // val downOutFifo = Module(new Queue(UInt(8.W), 8)) val upInFifo = Module(new Queue(UInt(8.W), 8)) // val upOutFifo = Module(new Queue(UInt(8.W), 8)) downInFifo.io.enq <> io.downIn io.downOut.valid := ( === FRAME_STYLE_COMMON ) & io.upOut.valid := ( === FRAME_STYLE_PROBE) & | io.upOut.bits := Mux1H(Seq( ( === FRAME_STYLE_PROBE) -> downInFifo.io.deq.bits, //嗅探包情形 -> upInFifo.io.deq.bits, //上行 -> //上行修正数据 )) io.downOut.bits := Mux1H(Seq( -> //自主发送嗅探包 ( ) -> downInFifo.io.deq.bits, //下行 ( ) -> //下行修正数据 )) downInFifo.io.deq.ready := upInFifo.io.deq.ready := } class SlaveParser extends SlaveParserBase{ }