#include "tl2cdr.h"
#include "system_cfg.h"

.extern main

.extern int_svr_code
.extern plic_claim
.extern exti_isr_flag
.extern mtimer_int_flag

#ifdef __riscv_i
.extern plic_handle
#endif

.globl _prog_start
.section .text.init


_prog_start:
	li x1,  0
	li x2,  0
	li x3,  0
	li x4,  0
	li x5,  0
	li x6,  0
	li x7,  0
	li x8,  0
	li x9,  0
	li x10, 0
	li x11, 0
	li x12, 0
	li x13, 0
	li x14, 0
	li x15, 0
#ifdef __riscv_i
	li x16, 0
	li x17, 0
	li x18, 0
	li x19, 0
	li x20, 0
	li x21, 0
	li x22, 0
	li x23, 0
	li x24, 0
	li x25, 0
	li x26, 0
	li x27, 0
	li x28, 0
	li x29, 0
	li x30, 0
	li x31, 0
#endif

	//li sp, 0x40011000
       li t0, STACK_SIZE
       la sp, sys_stack
       add sp, sp, t0

#ifdef __riscv_i
	la t0, trap_entry
#else
	li 	a0, 0

	lui    t0, %hi(plic_claim)
	lw 	a1, %lo(plic_claim)(t0)

       la     a2, exti_isr_flag

	call int_svr_code
	mv t0, a0					#这里选择不同的trap_entry服务函数,这个是RV32I的代码
#endif
	csrw mtvec, t0
	li t0, (1 << 11) //| (1 << 13) //13bit是rocc的中断
	csrw mie, t0

	csrr t0, mstatus
	ori t0, t0, 1<<3
	csrw mstatus, t0

	call main

	ecall

#ifdef __riscv_i
	.balign 32
trap_entry:
#.macro define_const name, value
#    .equ \name, \value
#.endm
## 使用宏定义常量
#define_const CDR_INT_TXEND,   14
opt_trap_entry:

       addi   sp,sp,136

       #sw     ra,4(sp)
       #sw     sp,8(sp)
       #sw     gp,12(sp)
       #sw     tp,16(sp)

       sw     t0,20(sp)
       sw     t1,24(sp)
       sw     t2,28(sp)
       sw     s0,32(sp)
       sw     s1,36(sp)

       #sw     a0,40(sp)
       #sw     a1,44(sp)
       #sw     a2,48(sp)
       #sw     a3,52(sp)
       #sw     a4,56(sp)
       #sw     a5,60(sp)
       #sw     a6,64(sp)
       #sw     a7,68(sp)
       #sw     s2,72(sp)
       #sw     s3,76(sp)
       #sw     s4,80(sp)
       #sw     s5,84(sp)
       #sw     s6,88(sp)
       #sw     s7,92(sp)
       #sw     s8,96(sp)
       #sw     s9,100(sp)
       #sw     s10,104(sp)
       #sw     s11,108(sp)
       #sw     t3,112(sp)
       #sw     t4,116(sp)
       #sw     t5,120(sp)
       #sw     t6,124(sp)
       
       csrr   t2, mcause
       //li     s0, 0x80000000
       //and    s0, t2, s0
       srli   s0, t2, 31
1:     beqz   s0, 1b               #这个是异常,死循环查问题吧
       andi   s0, t2, 0xf
       la     t2, isr_j_table
       slli   s0, s0, 2
       add    t2, t2, s0
       jr     t2
       
swi_isr:
       j      exit_isr  # jump to exit_isr
       
mtime_isr:
       li     t1, 0x80
       csrc   mie, t1
       la     t1, mtimer_int_flag
       li     t0, 1
       sw     t0, 0(t1)
       j      exit_isr  # jump to exit_isr
       
exti_isr:
       lui    t1, %hi(plic_claim)             
       lw     t0, %lo(plic_claim)(t1) # t0 = &plic_claim

       lw     t1, 0(t0)                           # t1 = *plic_claim
       sw     t1, 0(t0)                           # *plic_claim = t1

       slli   s0, t1, 2
       la     s1, exti_isr_flag
       add    s1, s1, s0
       li     t0, 1
       sw     t0, 0(s1)

       #lw     ra,4(sp)
       #lw     sp,8(sp)
       #lw     gp,12(sp)
       #lw     tp,16(sp)
rocc_isr:
       //add rocc interrupt here
       i_hlm_read_intflag(t0)
       i_hlm_clear_intflag(t0)

exit_isr:       
       lw     t0,20(sp)
       lw     t1,24(sp)
       lw     t2,28(sp)
       lw     s0,32(sp)
       lw     s1,36(sp)

       #lw     a0,40(sp)
       #lw     a1,44(sp)
       #lw     a2,48(sp)
       #lw     a3,52(sp)
       #lw     a4,56(sp)
       #lw     a5,60(sp)
       #lw     a6,64(sp)
       #lw     a7,68(sp)
       #lw     s2,72(sp)
       #lw     s3,76(sp)
       #lw     s4,80(sp)
       #lw     s5,84(sp)
       #lw     s6,88(sp)
       #lw     s7,92(sp)
       #lw     s8,96(sp)
       #lw     s9,100(sp)
       #lw     s10,104(sp)
       #lw     s11,108(sp)
       #lw     t3,112(sp)
       #lw     t4,116(sp)
       #lw     t5,120(sp)
       #lw     t6,124(sp)

       addi   sp,sp,136
       mret

isr_j_table:
1:     j      1b  # 0 jump to unknown_isr
1:     j      1b  # 1 jump to unknown_isr
1:     j      1b  # 2 jump to unknown_isr
       j      swi_isr    # 3 jump to swi_isr
1:     j      1b  # 4 jump to unknown_isr
1:     j      1b  # 5 jump to unknown_isr
1:     j      1b  # 6 jump to unknown_isr
       j      mtime_isr  # 7 jump to unknown_isr
1:     j      1b  # 8 jump to unknown_isr
1:     j      1b  # 9 jump to unknown_isr
1:     j      1b  # a jump to unknown_isr
       j      exti_isr   # b jump to exti_isr
1:     j      1b  # c jump to unknown_isr
       j      rocc_isr  # d jump to unknown_isr
1:     j      1b  # e jump to unknown_isr
1:     j      1b  # f jump to unknown_isr
#endif