#include #include "tl2cdr.h" #ifndef TL2CDR_BASE #error TL2CDR Base address not define!!! #endif #ifdef OLD_CODE volatile uint32_t * const cdr_status = (uint32_t*)( TL2CDR_BASE + CDR_ReadStatus ); //read volatile uint32_t * const cdr_txLen = (uint32_t*)( TL2CDR_BASE + CDR_WriteTxLen ); //write volatile uint32_t * const cdr_txFifo = (uint32_t*)( TL2CDR_BASE + CDR_WriteTxFifo ); //write volatile uint32_t * const cdr_direct = (uint32_t*)( TL2CDR_BASE + CDR_WriteTransDir ); //write volatile uint32_t * const cdr_softReset = (uint32_t*)( TL2CDR_BASE + CDR_WriteSoftReset ); //write volatile uint32_t * const cdr_rxLen = (uint32_t*)( TL2CDR_BASE + CDR_ReadRxLen ); //read volatile uint32_t * const cdr_rxFifo = (uint32_t*)( TL2CDR_BASE + CDR_ReadRxFifo ); //read volatile uint32_t * const cdr_IsLast = (uint32_t*)( TL2CDR_BASE + CDR_ReadIsLast ); //read volatile uint32_t * const cdr_rxCrc = (uint32_t*)( TL2CDR_BASE + CDR_ReadRxCrc ); volatile uint32_t * const cdr_txCrc = (uint32_t*)( TL2CDR_BASE + CDR_ReadTxCrc); #endif volatile uint32_t * const tx0_softReset = (uint32_t*)( TL2CDR_BASE + TX0_WriteSoftReset ); volatile uint32_t * const tx0_txLen = (uint32_t*)( TL2CDR_BASE + TX0_WriteTxLen ); volatile uint32_t * const tx0_txFifo = (uint32_t*)( TL2CDR_BASE + TX0_WriteTxFifo ); volatile uint32_t * const tx0_txCrc = (uint32_t*)( TL2CDR_BASE + TX0_ReadTxCrc ); volatile uint32_t * const tx1_softReset = (uint32_t*)( TL2CDR_BASE + TX1_WriteSoftReset ); volatile uint32_t * const tx1_txLen = (uint32_t*)( TL2CDR_BASE + TX1_WriteTxLen ); volatile uint32_t * const tx1_txFifo = (uint32_t*)( TL2CDR_BASE + TX1_WriteTxFifo ); volatile uint32_t * const tx1_txCrc = (uint32_t*)( TL2CDR_BASE + TX1_ReadTxCrc ); volatile uint32_t * const rx0_softReset = (uint32_t*)( TL2CDR_BASE + RX0_WriteSoftReset ); volatile uint32_t * const rx0_rxLen = (uint32_t*)( TL2CDR_BASE + RX0_ReadRxLen ); volatile uint32_t * const rx0_rxFifo = (uint32_t*)( TL2CDR_BASE + RX0_ReadRxFifo ); volatile uint32_t * const rx0_rxCrc = (uint32_t*)( TL2CDR_BASE + RX0_ReadRxCrc ); volatile uint32_t * const rx0_rxTimerAim = (uint32_t*)( TL2CDR_BASE + RX0_WrtieLimitTimerAim ); volatile uint32_t * const rx0_rxTxPair = (uint32_t*)( TL2CDR_BASE + RX0_WriteLimitTxPair ); volatile uint32_t * const rx1_softReset = (uint32_t*)( TL2CDR_BASE + RX1_WriteSoftReset ); volatile uint32_t * const rx1_rxLen = (uint32_t*)( TL2CDR_BASE + RX1_ReadRxLen ); volatile uint32_t * const rx1_rxFifo = (uint32_t*)( TL2CDR_BASE + RX1_ReadRxFifo ); volatile uint32_t * const rx1_rxCrc = (uint32_t*)( TL2CDR_BASE + RX1_ReadRxCrc ); volatile uint32_t * const rx1_rxTimerAim = (uint32_t*)( TL2CDR_BASE + RX1_WrtieLimitTimerAim ); volatile uint32_t * const rx1_rxTxPair = (uint32_t*)( TL2CDR_BASE + RX1_WriteLimitTxPair ); volatile uint32_t * const HLM_status = (uint32_t*)( TL2CDR_BASE + HLM_ReadStatus ); volatile uint32_t * const HLM_isLast = (uint32_t*)( TL2CDR_BASE + HLM_ReadIsLast );