diff --git a/src/main/scala/backBoard/shin/SpiInterface.scala b/src/main/scala/backBoard/shin/SpiInterface.scala
index bc43850..8408789 100644
--- a/src/main/scala/backBoard/shin/SpiInterface.scala
+++ b/src/main/scala/backBoard/shin/SpiInterface.scala
@@ -156,7 +156,7 @@ class SSpiInterface extends SpiInterfaceBase{
     exRego := 0.U //第一个byte 地址0
   } .elsewhen( isSckPosedge & ~shiftCSn(1) ){
     when( bitSel.andR ){
-      when((byteSel === 0.U || byteSel === 1.U || byteSel === 2.U || byteSel === 3.U ) ){
+      when((byteSel === 0.U || byteSel === 1.U || byteSel === 2.U ) ){ //第3byte准备，第4byte开始发送
         exRego := 0.U //地址1，cmd
       } .elsewhen( isSpiRead ){
         exRego := io.datar