diff --git a/src/main/scala/backBoard/shin/Interface.scala b/src/main/scala/backBoard/shin/Interface.scala
index bb70219..bd31d84 100644
--- a/src/main/scala/backBoard/shin/Interface.scala
+++ b/src/main/scala/backBoard/shin/Interface.scala
@@ -953,8 +953,10 @@ trait InterfaceSystem{ this: InterfaceBase =>
 
   cReg.intEnable :=
     Cat(
-      1.U(1.W), //复位中断，时钟为1
-      RegEnable( dataw(6,0), 0.U, isEnW & addrw === "h73".U ),
+      1.U(1.W), //复位中断，时钟为1 //31 上电复位
+      1.U(1.W), //复位中断，时钟为1 //30 上行硬件错误
+      1.U(1.W), //复位中断，时钟为1 //29 下行硬件错误
+      RegEnable( dataw(4,0), 0.U, isEnW & addrw === "h73".U ),
       RegEnable( dataw, 0.U, isEnW & addrw === "h72".U ),
       RegEnable( dataw, 0.U, isEnW & addrw === "h71".U ),
       RegEnable( dataw, 0.U, isEnW & addrw === "h70".U ),